From 623b638607aa00dad85cee36e229011c79b249ce Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 13 Oct 2014 23:42:00 -0600 Subject: dm: spi: Add soft_spi implementation Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model. Signed-off-by: Simon Glass Reviewed-by: Jagannadha Sutradharudu Teki --- doc/device-tree-bindings/spi/soft-spi.txt | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 doc/device-tree-bindings/spi/soft-spi.txt (limited to 'doc') diff --git a/doc/device-tree-bindings/spi/soft-spi.txt b/doc/device-tree-bindings/spi/soft-spi.txt new file mode 100644 index 0000000000..d09c1a5076 --- /dev/null +++ b/doc/device-tree-bindings/spi/soft-spi.txt @@ -0,0 +1,34 @@ +Soft SPI + +The soft SPI bus implementation allows the use of GPIO pins to simulate a +SPI bus. No SPI host is required for this to work. The down-side is that the +performance will typically be much lower than a real SPI bus. + +The soft SPI node requires the following properties: + +compatible: "u-boot,soft-spi" +soft_spi_cs: GPIO number to use for SPI chip select (output) +soft_spi_sclk: GPIO number to use for SPI clock (output) +soft_spi_mosi: GPIO number to use for SPI MOSI line (output) +soft_spi_miso GPIO number to use for SPI MISO line (input) +spi-delay-us: Number of microseconds of delay between each CS transition + +The GPIOs should be specified as required by the GPIO controller referenced. +The first cell holds the phandle of the controller and the second cell +typically holds the GPIO number. + + +Example: + + soft-spi { + compatible = "u-boot,soft-spi"; + cs-gpio = <&gpio 235 0>; /* Y43 */ + sclk-gpio = <&gpio 225 0>; /* Y31 */ + mosi-gpio = <&gpio 227 0>; /* Y33 */ + miso-gpio = <&gpio 224 0>; /* Y30 */ + spi-delay-us = <1>; + #address-cells = <1>; + #size-cells = <0>; + cs@0 { + }; + }; -- cgit v1.2.1