From d04c1efae3d834db6e21e9976e338bf1e588e987 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Tue, 9 Mar 2010 18:32:16 -0600 Subject: ColdFire: Correct bit definition Use correct definition for _MASK and _UNMASK. It was combined in the previous used and causes confusion. Signed-off-by: TsiChung Liew --- cpu/mcf5445x/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu/mcf5445x/cpu_init.c') diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c index 48b37dfe7d..00b7910ccd 100644 --- a/cpu/mcf5445x/cpu_init.c +++ b/cpu/mcf5445x/cpu_init.c @@ -164,9 +164,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear) ~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); if (info->iobase == CONFIG_SYS_FEC0_IOBASE) - gpio->par_fec &= GPIO_PAR_FEC_FEC0_MASK; + gpio->par_fec &= GPIO_PAR_FEC_FEC0_UNMASK; else - gpio->par_fec &= GPIO_PAR_FEC_FEC1_MASK; + gpio->par_fec &= GPIO_PAR_FEC_FEC1_UNMASK; } return 0; } -- cgit v1.2.1 From 52affe04fa5493597d8a5f6202507190950a32e6 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Tue, 9 Mar 2010 19:17:52 -0600 Subject: ColdFire: Update processors' serial port configuration Provide parameter passing to uart_port_config(). Update port configuration - un-mask it before enable the bits. Signed-off-by: TsiChung Liew --- cpu/mcf5445x/cpu_init.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'cpu/mcf5445x/cpu_init.c') diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c index 00b7910ccd..00e0ca6da9 100644 --- a/cpu/mcf5445x/cpu_init.c +++ b/cpu/mcf5445x/cpu_init.c @@ -128,19 +128,43 @@ int cpu_init_r(void) return (0); } -void uart_port_conf(void) +void uart_port_conf(int port) { volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; /* Setup Ports: */ - switch (CONFIG_SYS_UART_PORT) { + switch (port) { case 0: - gpio->par_uart = + gpio->par_uart &= + ~(GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD); + gpio->par_uart |= (GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD); break; case 1: - gpio->par_uart = +#ifdef CONFIG_SYS_UART1_PRI_GPIO + gpio->par_uart &= + ~(GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD); + gpio->par_uart |= (GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD); +#elif defined(CONFIG_SYS_UART1_ALT1_GPIO) + gpio->par_ssi &= + (GPIO_PAR_SSI_SRXD_UNMASK | GPIO_PAR_SSI_STXD_UNMASK); + gpio->par_ssi |= + (GPIO_PAR_SSI_SRXD_U1RXD | GPIO_PAR_SSI_STXD_U1TXD); +#endif + break; + case 2: +#if defined(CONFIG_SYS_UART2_ALT1_GPIO) + gpio->par_timer &= + (GPIO_PAR_TIMER_T3IN_UNMASK | GPIO_PAR_TIMER_T2IN_UNMASK); + gpio->par_timer |= + (GPIO_PAR_TIMER_T3IN_U2RXD | GPIO_PAR_TIMER_T2IN_U2TXD); +#elif defined(CONFIG_SYS_UART2_ALT2_GPIO) + gpio->par_timer &= + (GPIO_PAR_FECI2C_SCL_UNMASK | GPIO_PAR_FECI2C_SDA_UNMASK); + gpio->par_timer |= + (GPIO_PAR_FECI2C_SCL_U2TXD | GPIO_PAR_FECI2C_SDA_U2RXD); +#endif break; } } -- cgit v1.2.1 From 68e4e76af55746a4330865f56476e58ce4140ca8 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Thu, 11 Mar 2010 15:04:21 -0600 Subject: ColdFire: Relocate vector table - mcf5445x Newer ColdFire processors family boot from address 0 instead of 0xFFnn_nnnn. When the boot flash base chip select is set at new location instead of 0, an un-predictable error will occur if there is an vector being trigger and refer it to an invalid address or the vector table handler is not existed at address 0. Signed-off-by: TsiChung Liew --- cpu/mcf5445x/cpu_init.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'cpu/mcf5445x/cpu_init.c') diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c index 00e0ca6da9..8d51d35d68 100644 --- a/cpu/mcf5445x/cpu_init.c +++ b/cpu/mcf5445x/cpu_init.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #if defined(CONFIG_CMD_NET) @@ -105,6 +106,14 @@ void cpu_init_f(void) fbcs->csmr5 = CONFIG_SYS_CS5_MASK; #endif + /* + * now the flash base address is no longer at 0 (Newer ColdFire family + * boot at address 0 instead of 0xFFnn_nnnn). The vector table must + * also move to the new location. + */ + if (CONFIG_SYS_CS0_BASE != 0) + setvbr(CONFIG_SYS_CS0_BASE); + #ifdef CONFIG_FSL_I2C gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA; #endif -- cgit v1.2.1