From 7599b53dc1a1c89457a755858d4b6946e0e7fadd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 12 Jul 2015 15:23:28 +0200 Subject: arm: socfpga: config: Move SPL GD and malloc to RAM Now that the SPL structure is organised such that it matches the U-Boot's SPL design, it is possible to use the option of relocating GD to RAM. And since we have GD in RAM, move malloc area to RAM as well. We point the malloc base pointer 1 MiB past U-Boot's load address. We use simple malloc for SPL because it is 3kiB smaller in terms of code size than regular malloc which was used thus far. Signed-off-by: Marek Vasut --- configs/socfpga_arria5_defconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'configs/socfpga_arria5_defconfig') diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index ee03156046..4d1cd21c15 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -14,3 +14,6 @@ CONFIG_SPL_SIMPLE_BUS=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x00800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 -- cgit v1.2.1