From 784c705b79b08b3c2c599766ea97ce7de3b32423 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 14 Jul 2016 00:02:38 +0930 Subject: board/aspeed: Add ast-g4 board This adds a Aspeed fourth generation board with defconfigs for a system with NCSI and with a directly attached PHY configuration. Signed-off-by: Joel Stanley --- board/aspeed/Kconfig | 16 +++++++++ board/aspeed/ast-g4/Kconfig | 22 ++++++++++++ board/aspeed/ast-g4/Makefile | 1 + board/aspeed/ast-g4/ast-g4.c | 79 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 118 insertions(+) create mode 100644 board/aspeed/Kconfig create mode 100644 board/aspeed/ast-g4/Kconfig create mode 100644 board/aspeed/ast-g4/Makefile create mode 100644 board/aspeed/ast-g4/ast-g4.c (limited to 'board') diff --git a/board/aspeed/Kconfig b/board/aspeed/Kconfig new file mode 100644 index 0000000000..5d356e297a --- /dev/null +++ b/board/aspeed/Kconfig @@ -0,0 +1,16 @@ +source "board/aspeed/ast-g5/Kconfig" +source "board/aspeed/ast-g4/Kconfig" + +choice + prompt "Network configuration" + default ASPEED_NET_NCSI + help + Select Aspeed network configuration + +config ASPEED_NET_PHY + bool "Use a direct attached PHY" + +config ASPEED_NET_NCSI + bool "Use a network controller attached via NSCI" + +endchoice diff --git a/board/aspeed/ast-g4/Kconfig b/board/aspeed/ast-g4/Kconfig new file mode 100644 index 0000000000..2bec9a733a --- /dev/null +++ b/board/aspeed/ast-g4/Kconfig @@ -0,0 +1,22 @@ +if TARGET_AST_G4 + +config SYS_ARCH + default "arm" + +config SYS_CPU + default "arm926ejs" + +config SYS_BOARD + default "ast-g4" + +config SYS_VENDOR + default "aspeed" + +config SYS_SOC + default "aspeed" + +config SYS_CONFIG_NAME + default "ast-g4-phy" if ASPEED_NET_PHY + default "ast-g4-ncsi" if ASPEED_NET_NCSI + +endif diff --git a/board/aspeed/ast-g4/Makefile b/board/aspeed/ast-g4/Makefile new file mode 100644 index 0000000000..8ff2692fcc --- /dev/null +++ b/board/aspeed/ast-g4/Makefile @@ -0,0 +1 @@ +obj-y = ast-g4.o diff --git a/board/aspeed/ast-g4/ast-g4.c b/board/aspeed/ast-g4/ast-g4.c new file mode 100644 index 0000000000..cc26a78529 --- /dev/null +++ b/board/aspeed/ast-g4/ast-g4.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2002 Ryan Chen + * Copyright 2016 IBM Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->flags = 0; + return 0; +} + +int misc_init_r(void) +{ + u32 reg; + + /* Unlock AHB controller */ + writel(AHBC_PROTECT_UNLOCK, AST_AHBC_BASE); + + /* Map DRAM to 0x00000000 */ + reg = readl(AST_AHBC_BASE + AST_AHBC_ADDR_REMAP); + writel(reg | BIT(0), AST_AHBC_BASE + AST_AHBC_ADDR_REMAP); + + /* Unlock SCU */ + writel(SCU_PROTECT_UNLOCK, AST_SCU_BASE); + + /* + * The original file contained these comments. + * TODO: verify the register write does what it claims + * + * LHCLK = HPLL/8 + * PCLK = HPLL/8 + * BHCLK = HPLL/8 + */ + reg = readl(AST_SCU_BASE + AST_SCU_CLK_SEL); + reg &= 0x1c0fffff; + reg |= 0x61800000; + writel(reg, AST_SCU_BASE + AST_SCU_CLK_SEL); + + return 0; +} + +int dram_init(void) +{ + u32 vga = ast_scu_get_vga_memsize(); + u32 dram = ast_sdmc_get_mem_size(); + gd->ram_size = dram - vga; + + return 0; +} + +#ifdef CONFIG_FTGMAC100 +int board_eth_init(bd_t *bd) +{ + return ftgmac100_initialize(bd); +} +#endif + +#ifdef CONFIG_ASPEEDNIC +int board_eth_init(bd_t *bd) +{ + return aspeednic_initialize(bd); +} +#endif -- cgit v1.2.1