From abc7d0f75c078524f713cb2d4b4efe1b1a122c60 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Thu, 28 Jan 2016 15:38:15 +0800 Subject: armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie Reviewed-by: York Sun --- board/freescale/ls2080ardb/ls2080ardb.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board') diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c63b639625..12638dfb14 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -149,6 +149,7 @@ int board_init(void) { char *env_hwconfig; u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE; u32 val; init_final_memctl_regs(); @@ -170,6 +171,9 @@ int board_init(void) QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); + /* invert AQR405 IRQ pins polarity */ + out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); + return 0; } -- cgit v1.2.1 From 0f4b82a555a3b4eab2febf06eedf51ad85ba8ddd Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Wed, 24 Feb 2016 17:02:32 +0530 Subject: armv8: ls2085a: Remove phy configuration from QDS and RDB As phy_connect and phy_config are being called from DPAA2 driver. Remove calling of mentioned function from board file. Signed-off-by: Pratiyush Mohan Srivastava Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- board/freescale/ls2080aqds/eth.c | 25 ------------------- board/freescale/ls2080ardb/eth_ls2080rdb.c | 39 ------------------------------ 2 files changed, 64 deletions(-) (limited to 'board') diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index 42ff74317e..33ad7dcf3e 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -548,12 +548,6 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 2: /* Slot housing a SGMII riser card? */ @@ -562,12 +556,6 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT2; bus = mii_dev_for_muxval(EMI1_SLOT2); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 3: break; @@ -606,12 +594,6 @@ serdes2: dpmac_info[dpmac_id].board_mux = EMI1_SLOT4; bus = mii_dev_for_muxval(EMI1_SLOT4); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 5: break; @@ -679,13 +661,6 @@ void ls2080a_handle_phy_interface_qsgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - - phy_config(dpmac_info[dpmac_id].phydev); break; case 3: break; diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index db50e4efa9..58ea746547 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -20,42 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; -int load_firmware_cortina(struct phy_device *phy_dev) -{ - if (phy_dev->drv->config) - return phy_dev->drv->config(phy_dev); - - return 0; -} - -void load_phy_firmware(void) -{ - int i; - u8 phy_addr; - struct phy_device *phy_dev; - struct mii_dev *dev; - phy_interface_t interface; - - /*Initialize and upload firmware for all the PHYs*/ - for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC8; i++) { - interface = wriop_get_enet_if(i); - if (interface == PHY_INTERFACE_MODE_XGMII) { - dev = wriop_get_mdio(i); - phy_addr = wriop_get_phy_address(i); - phy_dev = phy_find_by_mask(dev, 1 << phy_addr, - interface); - if (!phy_dev) { - printf("No phydev for phyaddr %d\n", phy_addr); - continue; - } - - /*Flash firmware for All CS4340 PHYS */ - if (phy_dev->phy_id == PHY_UID_CS4340) - load_firmware_cortina(phy_dev); - } - } -} - int board_eth_init(bd_t *bis) { #if defined(CONFIG_FSL_MC_ENET) @@ -125,9 +89,6 @@ int board_eth_init(bd_t *bis) } } - /* Load CORTINA CS4340 PHY firmware */ - load_phy_firmware(); - cpu_eth_init(bis); #endif /* CONFIG_FMAN_ENET */ -- cgit v1.2.1 From 1be8d10be42441d720076c23a2eb66a1323dbbc4 Mon Sep 17 00:00:00 2001 From: Wenbin Song Date: Wed, 9 Mar 2016 13:38:23 +0800 Subject: freescale: vid: Return i2c mux to default channel IR chip is on one of the channels on multiplexed I2C-bus. Reset to default channel after accessing. Signed-off-by: Wenbin Song Reviewed-by: York Sun --- board/freescale/common/vid.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'board') diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 1bd65a8e55..a6a132ab19 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -454,6 +454,9 @@ int adjust_vdd(ulong vdd_override) exit: if (re_enable) enable_interrupts(); + + i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); + return ret; } @@ -469,7 +472,7 @@ static int print_vdd(void) ret = find_ir_chip_on_i2c(); if (ret < 0) { printf("VID: Could not find voltage regulator on I2C.\n"); - return -1; + goto exit; } else { i2caddress = ret; debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); @@ -481,11 +484,14 @@ static int print_vdd(void) vdd_last = read_voltage(i2caddress); if (vdd_last < 0) { printf("VID: Couldn't read sensor abort VID adjustment\n"); - return -1; + goto exit; } printf("VID: Core voltage is at %d mV\n", vdd_last); +exit: + i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); + + return ret < 0 ? -1 : 0; - return 0; } static int do_vdd_override(cmd_tbl_t *cmdtp, -- cgit v1.2.1 From ec44289db5c340872bdc76dfcea50bb9b6c56d4d Mon Sep 17 00:00:00 2001 From: Wenbin Song Date: Wed, 9 Mar 2016 13:38:24 +0800 Subject: armv8/ls1043aqds: Return i2c mux to default chennel Return i2c mux to the default channel after accessing retimer. Signed-off-by: Wenbin Song Reviewed-by: York Sun --- board/freescale/ls1043aqds/ls1043aqds.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index a72fe52ea0..fba6b88951 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -170,8 +170,7 @@ void board_retimer_init(void) u8 reg; /* Retimer is connected to I2C1_CH7_CH5 */ - reg = I2C_MUX_CH7; - i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, ®, 1); + select_i2c_ch_pca9547(I2C_MUX_CH7); reg = I2C_MUX_CH5; i2c_write(I2C_MUX_PCA_ADDR_SEC, 0, 1, ®, 1); @@ -219,6 +218,9 @@ void board_retimer_init(void) i2c_write(I2C_RETIMER_ADDR, 0x63, 1, ®, 1); reg = 0xcd; i2c_write(I2C_RETIMER_ADDR, 0x64, 1, ®, 1); + + /* Return the default channel */ + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); } int board_early_init_f(void) -- cgit v1.2.1