From 47cd00fa707af9de76408b69d3e911717dbbfab1 Mon Sep 17 00:00:00 2001 From: wdenk Date: Thu, 6 Mar 2003 13:39:27 +0000 Subject: * Patches by Robert Schwebel, 06 Mar 2003: - fix bug in BOOTP code (must use NetCopyIP) - update of CSB226 port - clear BSS segment on XScale - added support for i2c_init_board() function - update to the Innokom plattform * Extend support for redundand environments for configurations where environment size < sector size --- board/cradle/u-boot.lds | 2 + board/csb226/csb226.c | 24 ++- board/csb226/flash.c | 382 +++++++++++++++++++++-------------------- board/csb226/memsetup.S | 32 ++-- board/csb226/u-boot.lds | 2 + board/innokom/flash.c | 258 ++++++++++++++++++++++++++-- board/innokom/innokom.c | 50 +++++- board/innokom/memsetup.S | 38 ++-- board/innokom/u-boot.lds | 2 + board/lubbock/u-boot.lds | 2 + board/mpl/common/common_util.c | 2 +- board/trab/u-boot.lds | 2 +- 12 files changed, 554 insertions(+), 242 deletions(-) (limited to 'board') diff --git a/board/cradle/u-boot.lds b/board/cradle/u-boot.lds index 0a89b3288d..280fc48ace 100644 --- a/board/cradle/u-boot.lds +++ b/board/cradle/u-boot.lds @@ -47,7 +47,9 @@ SECTIONS armboot_end_data = .; . = ALIGN(4); + bss_start = .; .bss : { *(.bss) } + bss_end = .; armboot_end = .; } diff --git a/board/csb226/csb226.c b/board/csb226/csb226.c index 0d99aa85b6..11cab005c6 100644 --- a/board/csb226/csb226.c +++ b/board/csb226/csb226.c @@ -32,10 +32,30 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -/* - * Miscelaneous platform dependent initialisations +/** + * misc_init_r: - misc initialisation routines */ +int misc_init_r(void) +{ + uchar *str; + + /* determine if the software update key is pressed during startup */ +#if 0 + /* not ported yet... */ + if (GPLR0 & 0x00000800) { + printf("using bootcmd_normal (sw-update button not pressed)\n"); + str = getenv("bootcmd_normal"); + } else { + printf("using bootcmd_update (sw-update button pressed)\n"); + str = getenv("bootcmd_update"); + } + + setenv("bootcmd",str); +#endif + return 0; +} + /** * board_init: - setup some data structures diff --git a/board/csb226/flash.c b/board/csb226/flash.c index 0b4e2f69ba..c6cb95e2f3 100644 --- a/board/csb226/flash.c +++ b/board/csb226/flash.c @@ -45,44 +45,44 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; ulong flash_init(void) { - int i, j; - ulong size = 0; + int i, j; + ulong size = 0; for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - ulong flashbase = 0; - flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F128J3 & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CFG_MAX_FLASH_SECT; - memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); + ulong flashbase = 0; + flash_info[i].flash_id = + (INTEL_MANUFACT & FLASH_VENDMASK) | + (INTEL_ID_28F128J3 & FLASH_TYPEMASK); + flash_info[i].size = FLASH_BANK_SIZE; + flash_info[i].sector_count = CFG_MAX_FLASH_SECT; + memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); switch (i) { - case 0: - flashbase = PHYS_FLASH_1; - break; - default: - panic("configured to many flash banks!\n"); - break; - } + case 0: + flashbase = PHYS_FLASH_1; + break; + default: + panic("configured to many flash banks!\n"); + break; + } for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; + flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; + } + size += flash_info[i].size; } - size += flash_info[i].size; - } /* Protect monitor and environment sectors */ - flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + _armboot_end_data - _armboot_start, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + _armboot_end_data - _armboot_start, + &flash_info[0]); - flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + flash_protect(FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); - return size; + return size; } @@ -94,43 +94,43 @@ ulong flash_init(void) void flash_print_info (flash_info_t *info) { - int i, j; + int i, j; for (j=0; jflash_id & FLASH_VENDMASK) { - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf("Intel: "); - break; - default: - printf("Unknown Vendor "); - break; - } + case (INTEL_MANUFACT & FLASH_VENDMASK): + printf("Intel: "); + break; + default: + printf("Unknown Vendor "); + break; + } switch (info->flash_id & FLASH_TYPEMASK) { - case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): - printf("28F128J3 (128Mbit)\n"); - break; - default: - printf("Unknown Chip Type\n"); + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf("28F128J3 (128Mbit)\n"); + break; + default: + printf("Unknown Chip Type\n"); return; - } + } - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); + printf(" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); - printf(" Sector Start Addresses:"); + printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) printf ("\n "); - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - info++; - } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + info++; + } } @@ -139,46 +139,47 @@ void flash_print_info (flash_info_t *info) * */ -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { - int flag, prot, sect; - int rc = ERR_OK; + int flag, prot, sect; + int rc = ERR_OK; - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } + if ((s_first < 0) || (s_first > s_last)) { + return ERR_INVAL; + } if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) - return ERR_UNKNOWN_FLASH_VENDOR; - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { + return ERR_UNKNOWN_FLASH_VENDOR; + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) prot++; } if (prot) return ERR_PROTECTED; - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts(); + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && !ctrlc(); sect++) { + flag = disable_interrupts(); - printf("Erasing sector %2d ... ", sect); + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last && !ctrlc(); sect++) { - /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + printf("Erasing sector %2d ... ", sect); - if (info->protect[sect] == 0) { /* not protected */ + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + + if (info->protect[sect] == 0) { /* not protected */ u32 * volatile addr = (u32 * volatile)(info->start[sect]); /* erase sector: */ @@ -190,32 +191,32 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) *addr = 0x00D000D0; /* erase confirm */ while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { + if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { *addr = 0x00B000B0; /* suspend erase*/ *addr = 0x00FF00FF; /* read mode */ - rc = ERR_TIMOUT; - goto outahere; - } - } + rc = ERR_TIMOUT; + goto outahere; + } + } *addr = 0x00500050; /* clear status register cmd. */ *addr = 0x00FF00FF; /* resest to read mode */ - } + } - printf("ok.\n"); - } + printf("ok.\n"); + } if (ctrlc()) printf("User Interrupt!\n"); -outahere: + outahere: - /* allow flash to settle - wait 10 ms */ - udelay_masked(10000); + /* allow flash to settle - wait 10 ms */ + udelay_masked(10000); if (flag) enable_interrupts(); - return rc; + return rc; } @@ -230,71 +231,71 @@ outahere: static int write_word (flash_info_t *info, ulong dest, ushort data) { - ushort *addr = (ushort *)dest, val; - int rc = ERR_OK; - int flag; + u32 * volatile addr = (u32 * volatile)dest, val; + int rc = ERR_OK; + int flag; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) return ERR_NOT_ERASED; - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts(); + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + flag = disable_interrupts(); - /* clear status register command */ - *addr = 0x50; + /* clear status register command */ + *addr = 0x50; - /* program set-up command */ - *addr = 0x40; + /* program set-up command */ + *addr = 0x40; - /* latch address/data */ - *addr = data; + /* latch address/data */ + *addr = data; - /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); - /* wait while polling the status register */ + /* wait while polling the status register */ while(((val = *addr) & 0x80) != 0x80) { - if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) { - rc = ERR_TIMOUT; + if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) { + rc = ERR_TIMOUT; *addr = 0xB0; /* suspend program command */ - goto outahere; + goto outahere; + } } - } - - if(val & 0x1A) { /* check for error */ - printf("\nFlash write error %02x at address %08lx\n", - (int)val, (unsigned long)dest); - if(val & (1<<3)) { - printf("Voltage range error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - if(val & (1<<1)) { - printf("Device protect error.\n"); - rc = ERR_PROTECTED; - goto outahere; - } - if(val & (1<<4)) { - printf("Programming error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - rc = ERR_PROG_ERROR; - goto outahere; - } - -outahere: + + if(val & 0x1A) { /* check for error */ + printf("\nFlash write error %02x at address %08lx\n", + (int)val, (unsigned long)dest); + if(val & (1<<3)) { + printf("Voltage range error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; + } + if(val & (1<<1)) { + printf("Device protect error.\n"); + rc = ERR_PROTECTED; + goto outahere; + } + if(val & (1<<4)) { + printf("Programming error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; + } + rc = ERR_PROG_ERROR; + goto outahere; + } + + outahere: *addr = 0xFF; /* read array command */ if (flag) enable_interrupts(); - return rc; + return rc; } @@ -311,63 +312,64 @@ outahere: int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { - ulong cp, wp; - ushort data; - int l; - int i, rc; - - wp = (addr & ~1); /* get lower word aligned address */ + ulong cp, wp; + ushort data; + int l; + int i, rc; + + wp = (addr & ~1); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i> 8) | (*(uchar *)cp << 8); + } + for (; i<2 && cnt>0; ++i) { + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; + } + for (; cnt==0 && i<2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 8); + } - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i> 8) | (*(uchar *)cp << 8); - } - for (; i<2 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt==0 && i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 2; } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* - * handle word aligned part - */ - while (cnt >= 2) { - /* data = *((vushort*)src); */ - data = *((ushort*)src); - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); + /* + * handle word aligned part + */ + while (cnt >= 2) { + /* data = *((vushort*)src); */ + data = *((ushort*)src); + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; } - src += 2; - wp += 2; - cnt -= 2; - } if (cnt == 0) return ERR_OK; - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); - } - - return write_word(info, wp, data); + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); + --cnt; + } + for (; i<2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 8); + } + + return write_word(info, wp, data); } + diff --git a/board/csb226/memsetup.S b/board/csb226/memsetup.S index d34ead4a5b..65671842aa 100644 --- a/board/csb226/memsetup.S +++ b/board/csb226/memsetup.S @@ -313,16 +313,22 @@ mem_init: /* documented in SDRAM data sheets. The address(es) used */ /* for this purpose must not be cacheable. */ - ldr r3, =CFG_DRAM_BASE - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] + /* There should 9 writes, since the first write doesn't */ + /* trigger a refresh cycle on PXA250. See Intel PXA250 and */ + /* PXA210 Processors Specification Update, */ + /* Jan 2003, Errata #116, page 30. */ + + ldr r3, =CFG_DRAM_BASE + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] /* Step 4g: Write MDCNFG with enable bits asserted */ /* (MDCNFG:DEx set to 1). */ @@ -339,7 +345,6 @@ mem_init: /* We are finished with Intel's memory controller initialisation */ - /* ---------------------------------------------------------------- */ /* Disable (mask) all interrupts at interrupt controller */ /* ---------------------------------------------------------------- */ @@ -378,10 +383,11 @@ initclks: str r2, [r1] /* enable the 32Khz oscillator for RTC and PowerManager */ +/* ldr r1, =OSCC mov r2, #OSCC_OON str r2, [r1] - +*/ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ /* has settled. */ 60: @@ -404,8 +410,7 @@ initclks: /* FIXME */ -#define NODEBUG -#ifdef NODEBUG +#ifndef DEBUG /*Disable software and data breakpoints */ mov r0,#0 mcr p15,0,r0,c14,c8,0 /* ibcr0 */ @@ -415,7 +420,6 @@ initclks: /*Enable all debug functionality */ mov r0,#0x80000000 mcr p14,0,r0,c10,c0,0 /* dcsr */ - #endif /* ---------------------------------------------------------------- */ diff --git a/board/csb226/u-boot.lds b/board/csb226/u-boot.lds index 0a89b3288d..280fc48ace 100644 --- a/board/csb226/u-boot.lds +++ b/board/csb226/u-boot.lds @@ -47,7 +47,9 @@ SECTIONS armboot_end_data = .; . = ALIGN(4); + bss_start = .; .bss : { *(.bss) } + bss_end = .; armboot_end = .; } diff --git a/board/innokom/flash.c b/board/innokom/flash.c index b8e97e1865..5505bb549b 100644 --- a/board/innokom/flash.c +++ b/board/innokom/flash.c @@ -31,12 +31,228 @@ #include #include -#define FLASH_BANK_SIZE 0x02000000 -#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */ +#if defined CFG_JFFS_CUSTOM_PART +#include +#endif + +/* Debugging macros ------------------------------------------------------ */ + +#undef FLASH_DEBUG +//#define FLASH_DEBUG 1 + +/* Some debug macros */ +#if (FLASH_DEBUG > 2 ) +#define PRINTK3(args...) printf(args) +#else +#define PRINTK3(args...) +#endif + +#if FLASH_DEBUG > 1 +#define PRINTK2(args...) printf(args) +#else +#define PRINTK2(args...) +#endif + +#ifdef FLASH_DEBUG +#define PRINTK(args...) printf(args) +#else +#define PRINTK(args...) +#endif + +/* ------------------------------------------------------------------------ */ + +/* Development system: we have only 16 MB Flash */ +#ifdef CONFIG_MTD_INNOKOM_16MB +#define FLASH_BANK_SIZE 0x01000000 /* 16 MB (during development) */ +#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */ +#endif + +/* Production system: we have 64 MB Flash */ +#ifdef CONFIG_MTD_INNOKOM_64MB +#define FLASH_BANK_SIZE 0x04000000 /* 64 MB */ +#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */ +#endif flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +#if defined CFG_JFFS_CUSTOM_PART + +/** + * jffs2_part_info - get information about a JFFS2 partition + * + * @part_num: number of the partition you want to get info about + * @return: struct part_info* in case of success, 0 if failure + */ + +static struct part_info part; + +#ifdef CONFIG_MTD_INNOKOM_16MB +#ifdef CONFIG_MTD_INNOKOM_64MB +#error Please define only one CONFIG_MTD_INNOKOM_XXMB option. +#endif +struct part_info* jffs2_part_info(int part_num) { + + PRINTK2("jffs2_part_info: part_num=%i\n",part_num); + + /* u-boot partition */ + if(part_num==0){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00000000; + part.size=256*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* primary OS+firmware partition */ + if(part_num==1){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00040000; + part.size=768*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* secondary OS+firmware partition */ + if(part_num==2){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00100000; + part.size=8*1024*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* data partition */ + if(part_num==3){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00900000; + part.size=7*1024*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + + return ∂ + } + + PRINTK("jffs2_part_info: end of partition table\n"); + return 0; +} +#endif /* CONFIG_MTD_INNOKOM_16MB */ + +#ifdef CONFIG_MTD_INNOKOM_64MB +#ifdef CONFIG_MTD_INNOKOM_16MB +#error Please define only one CONFIG_MTD_INNOKOM_XXMB option. +#endif +struct part_info* jffs2_part_info(int part_num) { + + PRINTK2("jffs2_part_info: part_num=%i\n",part_num); + + /* u-boot partition */ + if(part_num==0){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00000000; + part.size=256*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* primary OS+firmware partition */ + if(part_num==1){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x00040000; + part.size=16*1024*1024-128*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* secondary OS+firmware partition */ + if(part_num==2){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x01020000; + part.size=16*1024*1024-128*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + return ∂ + } + + /* data partition */ + if(part_num==3){ + if(part.usr_priv==(void*)1) return ∂ + + memset(&part, 0, sizeof(part)); + + part.offset=(char*)0x02000000; + part.size=32*1024*1024; + + /* Mark the struct as ready */ + part.usr_priv=(void*)1; + + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); + + return ∂ + } + + PRINTK("jffs2_part_info: end of partition table\n"); + return 0; +} +#endif /* CONFIG_MTD_INNOKOM_64MB */ +#endif /* defined CFG_JFFS_CUSTOM_PART */ + + /** * flash_init: - initialize data structures for flash chips * @@ -71,10 +287,10 @@ ulong flash_init(void) size += flash_info[i].size; } - /* Protect monitor and environment sectors */ + /* Protect u-boot sectors */ flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE, - CFG_FLASH_BASE + _armboot_end_data - _armboot_start, + CFG_FLASH_BASE + (256*1024) - 1, &flash_info[0]); #ifdef CFG_ENV_IS_IN_FLASH @@ -178,32 +394,38 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); + PRINTK("\n"); + /* arm simple, non interrupt dependent timer */ reset_timer_masked(); if (info->protect[sect] == 0) { /* not protected */ - u32 * volatile addr = (u32 * volatile)(info->start[sect]); + u16 * volatile addr = (u16 * volatile)(info->start[sect]); - /* erase sector: */ - /* The strata flashs are aligned side by side on */ - /* the data bus, so we have to write the commands */ - /* to both chips here: */ + PRINTK("unlocking sector\n"); + *addr = 0x0060; + *addr = 0x00d0; + *addr = 0x00ff; - *addr = 0x00200020; /* erase setup */ - *addr = 0x00D000D0; /* erase confirm */ + PRINTK("erasing sector\n"); + *addr = 0x0020; + PRINTK("confirming erase\n"); + *addr = 0x00D0; - while ((*addr & 0x00800080) != 0x00800080) { + while ((*addr & 0x0080) != 0x0080) { + PRINTK("."); if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { - *addr = 0x00B000B0; /* suspend erase*/ - *addr = 0x00FF00FF; /* read mode */ + *addr = 0x00B0; /* suspend erase*/ + *addr = 0x00FF; /* read mode */ rc = ERR_TIMOUT; goto outahere; } } - *addr = 0x00500050; /* clear status register cmd. */ - *addr = 0x00FF00FF; /* resest to read mode */ - + PRINTK("clearing status register\n"); + *addr = 0x0050; + PRINTK("resetting to read mode"); + *addr = 0x00FF; } printf("ok.\n"); @@ -233,7 +455,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) static int write_word (flash_info_t *info, ulong dest, ushort data) { - ushort *addr = (ushort *)dest, val; + volatile u16 *addr = (u16 *)dest, val; int rc = ERR_OK; int flag; diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c index 7d2702f658..17f6353d2e 100644 --- a/board/innokom/innokom.c +++ b/board/innokom/innokom.c @@ -25,6 +25,7 @@ #include #include +#include #ifdef CONFIG_SHOW_BOOT_PROGRESS # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) @@ -32,10 +33,53 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -/* - * Miscelaneous platform dependent initialisations +/** + * i2c_init_board - reset i2c bus. When the board is powercycled during a + * bus transfer it might hang; for details see doc/I2C_Edge_Conditions. + * The Innokom board has GPIO70 connected to SCLK which can be toggled + * until all chips think that their current cycles are finished. + */ +int i2c_init_board(void) +{ + int i; + + /* set gpio pin to output */ + GPDR(70) |= GPIO_bit(70); + for (i = 0; i < 11; i++) { + GPCR(70) = GPIO_bit(70); + udelay(10); + GPSR(70) = GPIO_bit(70); + udelay(10); + } + /* set gpio pin to input */ + GPDR(70) &= ~GPIO_bit(70); + + return 0; +} + + +/** + * misc_init_r: - misc initialisation routines */ +int misc_init_r(void) +{ + uchar *str; + + /* determine if the software update key is pressed during startup */ + if (GPLR0 & 0x00000800) { + printf("using bootcmd_normal (sw-update button not pressed)\n"); + str = getenv("bootcmd_normal"); + } else { + printf("using bootcmd_update (sw-update button pressed)\n"); + str = getenv("bootcmd_update"); + } + + setenv("bootcmd",str); + + return 0; +} + /** * board_init: - setup some data structures @@ -51,7 +95,7 @@ int board_init (void) /* so we do _nothing_ here */ /* arch number of Innokom board */ - gd->bd->bi_arch_number = 258; + gd->bd->bi_arch_number = MACH_TYPE_INNOKOM; /* adress of boot parameters */ gd->bd->bi_boot_params = 0xa0000100; diff --git a/board/innokom/memsetup.S b/board/innokom/memsetup.S index f7d5eee575..a2bc99d12d 100644 --- a/board/innokom/memsetup.S +++ b/board/innokom/memsetup.S @@ -38,6 +38,9 @@ DRAM_SIZE: .long CFG_DRAM_SIZE sub pc,pc,#4 .endm +_TEXT_BASE: + .word TEXT_BASE + /* * Memory setup @@ -222,6 +225,12 @@ mem_init: /* Step 2c: Write FLYCNFG FIXME: what's that??? */ /* ---------------------------------------------------------------- */ + /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ + adr r3, mem_init /* r0 <- current position of code */ + ldr r2, =mem_init + cmp r3, r2 /* skip init if in place */ + beq initirqs + /* ---------------------------------------------------------------- */ /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ @@ -313,17 +322,23 @@ mem_init: /* documented in SDRAM data sheets. The address(es) used */ /* for this purpose must not be cacheable. */ - ldr r3, =CFG_DRAM_BASE - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] + /* There should 9 writes, since the first write doesn't */ + /* trigger a refresh cycle on PXA250. See Intel PXA250 and */ + /* PXA210 Processors Specification Update, */ + /* Jan 2003, Errata #116, page 30. */ + ldr r3, =CFG_DRAM_BASE + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + /* Step 4g: Write MDCNFG with enable bits asserted */ /* (MDCNFG:DEx set to 1). */ @@ -339,7 +354,6 @@ mem_init: /* We are finished with Intel's memory controller initialisation */ - /* ---------------------------------------------------------------- */ /* Disable (mask) all interrupts at interrupt controller */ /* ---------------------------------------------------------------- */ @@ -405,8 +419,7 @@ initclks: /* FIXME */ -#define NODEBUG -#ifdef NODEBUG +#ifndef DEBUG /*Disable software and data breakpoints */ mov r0,#0 mcr p15,0,r0,c14,c8,0 /* ibcr0 */ @@ -416,7 +429,6 @@ initclks: /*Enable all debug functionality */ mov r0,#0x80000000 mcr p14,0,r0,c10,c0,0 /* dcsr */ - #endif /* ---------------------------------------------------------------- */ diff --git a/board/innokom/u-boot.lds b/board/innokom/u-boot.lds index 0a89b3288d..280fc48ace 100644 --- a/board/innokom/u-boot.lds +++ b/board/innokom/u-boot.lds @@ -47,7 +47,9 @@ SECTIONS armboot_end_data = .; . = ALIGN(4); + bss_start = .; .bss : { *(.bss) } + bss_end = .; armboot_end = .; } diff --git a/board/lubbock/u-boot.lds b/board/lubbock/u-boot.lds index 0a89b3288d..280fc48ace 100644 --- a/board/lubbock/u-boot.lds +++ b/board/lubbock/u-boot.lds @@ -47,7 +47,9 @@ SECTIONS armboot_end_data = .; . = ALIGN(4); + bss_start = .; .bss : { *(.bss) } + bss_end = .; armboot_end = .; } diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c index 60c49af151..a4a73a6b7c 100644 --- a/board/mpl/common/common_util.c +++ b/board/mpl/common/common_util.c @@ -301,7 +301,7 @@ extern char *stdio_names[]; void show_stdio_dev(void) { - /* Print informations */ + /* Print information */ printf ("In: "); if (stdio_devices[stdin] == NULL) { printf ("No input devices available!\n"); diff --git a/board/trab/u-boot.lds b/board/trab/u-boot.lds index 92a369f01a..5ea182923d 100644 --- a/board/trab/u-boot.lds +++ b/board/trab/u-boot.lds @@ -38,7 +38,7 @@ SECTIONS lib_generic/crc32.o (.text) lib_generic/string.o (.text) - . = env_offset; + . = DEFINED(env_offset) ? env_offset : .; common/environment.o (.ppcenv) *(.text) -- cgit v1.2.1