From d3aa051e7a29352aacb35d5392f3420d107e0f5a Mon Sep 17 00:00:00 2001 From: Han Pengfei Date: Thu, 12 Mar 2015 11:13:02 +0800 Subject: sun6i: Add support for the Mixtile LOFT-Q board The Mixtile LOFT-Q is an A31 based board with 2G RAM, 8G EMMC, sdio wifi, 1Gbit ethernet, HDMI display, toslink audio plug, 4 USB2.0 port, external USB2SATA connector, sd card plug, 3x60 external fpic expansion connector, NXP JN5168 zigbee gw, remote support. Also see http://focalcrest.com/en/pc.html#pro02 Signed-off-by: Han Pengfei Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index be4821360f..9e7064518a 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -120,6 +120,11 @@ M: Ian Campbell S: Maintained F: configs/Mele_M5_defconfig +MIXTILE-LOFTQ BOARD +M: Phil Han +S: Maintained +F: configs/mixtile_loftq_defconfig + MK808C BOARD M: Marcus Cooper S: Maintained -- cgit v1.2.1 From ebd468b2d26660ff7811e37cc64fa2369d4b5fff Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:07:12 +0100 Subject: sunxi: common VBUS detection logic in usbc VBUS detection could be needed not only by the musb code (to prevent host mode), but also by e.g. gadget drivers to start only when a cable is connected. In addition, this allows more flexibility in vbus detection, as it could easily be extended to other USBC indexes. Eventually, this would help making musb support independent from a hardcoded USB controller index (0). Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 2fcab602db..98228e87ff 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -229,7 +229,6 @@ config USB0_VBUS_PIN config USB0_VBUS_DET string "Vbus detect pin for usb0 (otg)" - depends on USB_MUSB_SUNXI default "" ---help--- Set the Vbus detect pin for usb0 (otg). This takes a string in the -- cgit v1.2.1 From f1df758d30f712be82177e3c4cbb9a44e5964b9b Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:07:13 +0100 Subject: sunxi: USB download gadget cable detection Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/board.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'board') diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 808bf82b65..3b419b398b 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -241,6 +241,13 @@ static struct musb_hdrc_platform_data musb_plat = { }; #endif +#ifdef CONFIG_USB_GADGET +int g_dnl_board_usb_cable_connected(void) +{ + return sunxi_usbc_vbus_detect(0); +} +#endif + #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { -- cgit v1.2.1 From 81f11872f3315a767940820e46d1a15b42d9b60c Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:07:14 +0100 Subject: sunxi: Ainol AW1 support The Ainol AW1 is an A20 based tablet with a 800x480 lcd screen, sdio wifi, volume up/down and home buttons, micro-sd slot, micro usb (otg), headphones connector and a SPCI modem connector. Also see: http://linux-sunxi.org/Ainol_AW1 Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 9e7064518a..87e7cb9bf8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -51,6 +51,11 @@ S: Maintained F: board/sunxi/dram_a20_olinuxino_l2.c F: configs/A20-OLinuXino-Lime2_defconfig +AINOL AW1 BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/Ainol_AW1_defconfig + AMPE A76 BOARD M: Paul Kocialkowski S: Maintained -- cgit v1.2.1 From 487b3277d4f70bcb2e4a1930beb6438565f25910 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:12:22 +0100 Subject: sunxi: GPIO pin mux hardware-feature-specific function index defines Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/board.c | 12 ++++++------ board/sunxi/gmac.c | 22 +++++++++++----------- 2 files changed, 17 insertions(+), 17 deletions(-) (limited to 'board') diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 3b419b398b..af8cf1104d 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -76,7 +76,7 @@ static void mmc_pinmux_setup(int sdc) case 0: /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { - sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } @@ -85,7 +85,7 @@ static void mmc_pinmux_setup(int sdc) case 1: /* CMD-PG3, CLK-PG4, D0~D3-PG5-8 */ for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN5I_GPG3_SDC1); + sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } @@ -94,7 +94,7 @@ static void mmc_pinmux_setup(int sdc) case 2: /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { - sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } @@ -103,7 +103,7 @@ static void mmc_pinmux_setup(int sdc) case 3: /* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */ for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3); + sunxi_gpio_set_cfgpin(pin, SUN4I_GPI_SDC3); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } @@ -155,8 +155,8 @@ int board_mmc_init(bd_t *bis) void i2c_init_board(void) { - sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0); - sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB_TWI0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB_TWI0); clock_twi_onoff(0, 1); #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA); diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 8849132627..63a7360b6d 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -39,45 +39,45 @@ int sunxi_gmac_initialize(bd_t *bis) if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14)) continue; #endif - sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN7I_GPA_GMAC); sunxi_gpio_set_drv(pin, 3); } #elif defined CONFIG_RGMII /* Configure sun6i RGMII mode pin mux settings */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); sunxi_gpio_set_drv(pin, 3); } for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); sunxi_gpio_set_drv(pin, 3); } for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); sunxi_gpio_set_drv(pin, 3); } for (pin = SUNXI_GPA(25); pin <= SUNXI_GPA(27); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); sunxi_gpio_set_drv(pin, 3); } #elif defined CONFIG_GMII /* Configure sun6i GMII mode pin mux settings */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); sunxi_gpio_set_drv(pin, 2); } #else /* Configure sun6i MII mode pin mux settings */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++) - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++) - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++) - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++) - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC); #endif #ifdef CONFIG_RGMII -- cgit v1.2.1 From 8deacca975585c11663db984002dca0c48bcc2d5 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:12:23 +0100 Subject: sunxi: Complete mmc pin mux for each supported platform, configured with Kconfig Sunxi platforms have different possible mmc pin mux setups (except for mmc0), which are different across platforms. This lets users configure which is used through the CONFIG_MMC*_PINS Kconfig options. This is especially relevant when a second (in addition to mmc0) port is used and CONFIG_MMC_SUNXI_SLOT_EXTRA is enabled. Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/Kconfig | 19 ++++++++ board/sunxi/board.c | 131 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 145 insertions(+), 5 deletions(-) (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 98228e87ff..ccc2080d8c 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -212,6 +212,25 @@ config MMC3_CD_PIN ---help--- See MMC0_CD_PIN help text. +config MMC1_PINS + string "Pins for mmc1" + default "" + ---help--- + Set the pins used for mmc1, when applicable. This takes a string in the + format understood by sunxi_name_to_gpio_bank, e.g. PH for port H. + +config MMC2_PINS + string "Pins for mmc2" + default "" + ---help--- + See MMC1_PINS help text. + +config MMC3_PINS + string "Pins for mmc3" + default "" + ---help--- + See MMC1_PINS help text. + config MMC_SUNXI_SLOT_EXTRA int "mmc extra slot number" default -1 diff --git a/board/sunxi/board.c b/board/sunxi/board.c index af8cf1104d..0c9d3b8029 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -71,10 +71,11 @@ int dram_init(void) static void mmc_pinmux_setup(int sdc) { unsigned int pin; + __maybe_unused int pins; switch (sdc) { case 0: - /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ + /* SDC0: PF0-PF5 */ for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); @@ -83,30 +84,150 @@ static void mmc_pinmux_setup(int sdc) break; case 1: - /* CMD-PG3, CLK-PG4, D0~D3-PG5-8 */ + pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS); + +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) + if (pins == SUNXI_GPIO_H) { + /* SDC1: PH22-PH-27 */ + for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } else { + /* SDC1: PG0-PG5 */ + for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } +#elif defined(CONFIG_MACH_SUN5I) + /* SDC1: PG3-PG8 */ for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN6I) + /* SDC1: PG0-PG5 */ + for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } +#elif defined(CONFIG_MACH_SUN8I) + if (pins == SUNXI_GPIO_D) { + /* SDC1: PD2-PD7 */ + for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } else { + /* SDC1: PG0-PG5 */ + for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } +#endif break; case 2: - /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */ + pins = sunxi_name_to_gpio_bank(CONFIG_MMC2_PINS); + +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) + /* SDC2: PC6-PC11 */ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN5I) + if (pins == SUNXI_GPIO_E) { + /* SDC2: PE4-PE9 */ + for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } else { + /* SDC2: PC6-PC15 */ + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } +#elif defined(CONFIG_MACH_SUN6I) + if (pins == SUNXI_GPIO_A) { + /* SDC2: PA9-PA14 */ + for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } else { + /* SDC2: PC6-PC15, PC24 */ + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + + sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(SUNXI_GPC(24), 2); + } +#elif defined(CONFIG_MACH_SUN8I) + /* SDC2: PC5-PC6, PC8-PC16 */ + for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + + for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) { + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } +#endif break; case 3: - /* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */ + pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS); + +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) + /* SDC3: PI4-PI9 */ for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { - sunxi_gpio_set_cfgpin(pin, SUN4I_GPI_SDC3); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3); sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN6I) + if (pins == SUNXI_GPIO_A) { + /* SDC3: PA9-PA14 */ + for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + } else { + /* SDC3: PC6-PC15, PC24 */ + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } + + sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3); + sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(SUNXI_GPC(24), 2); + } +#endif break; default: -- cgit v1.2.1 From 849d597bac145d2fd352349892206e0a60366577 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 22 Mar 2015 18:12:24 +0100 Subject: sunxi: Yones Toptech BD1078 support The Yones Toptech BD1078 is an A20 based 10" tablet with a 1024x600 lcd screen, volume up/down and back buttons, headphones jack, mini hdmi, micro usb (otg), micro usb (host), external micro-sd slot and a separate internal micro-sd slot. Also see: http://linux-sunxi.org/Yones_Toptech_BD1078 Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 87e7cb9bf8..f368d6fa04 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -154,3 +154,8 @@ WEXLER-TAB7200 BOARD M: Aleksei Mamlin S: Maintained F: configs/Wexler_TAB7200_defconfig + +YONES TOPTECH BD1078 BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/Yones_Toptech_BD1078_defconfig -- cgit v1.2.1 From 8c8165739baebbcd5fbf3db9030a3f180e4ef580 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sat, 28 Mar 2015 18:35:35 +0100 Subject: sunxi: Serial number support, obtained from SID bits Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/board.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) (limited to 'board') diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 0c9d3b8029..7633d65e6c 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -372,20 +372,31 @@ int g_dnl_board_usb_cable_connected(void) #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { + char serial_string[17] = { 0 }; unsigned int sid[4]; + uint8_t mac_addr[6]; + int ret; + + ret = sunxi_get_sid(sid); + if (ret == 0 && sid[0] != 0 && sid[3] != 0) { + if (!getenv("ethaddr")) { + /* Non OUI / registered MAC address */ + mac_addr[0] = 0x02; + mac_addr[1] = (sid[0] >> 0) & 0xff; + mac_addr[2] = (sid[3] >> 24) & 0xff; + mac_addr[3] = (sid[3] >> 16) & 0xff; + mac_addr[4] = (sid[3] >> 8) & 0xff; + mac_addr[5] = (sid[3] >> 0) & 0xff; + + eth_setenv_enetaddr("ethaddr", mac_addr); + } - if (!getenv("ethaddr") && sunxi_get_sid(sid) == 0 && - sid[0] != 0 && sid[3] != 0) { - uint8_t mac_addr[6]; - - mac_addr[0] = 0x02; /* Non OUI / registered MAC address */ - mac_addr[1] = (sid[0] >> 0) & 0xff; - mac_addr[2] = (sid[3] >> 24) & 0xff; - mac_addr[3] = (sid[3] >> 16) & 0xff; - mac_addr[4] = (sid[3] >> 8) & 0xff; - mac_addr[5] = (sid[3] >> 0) & 0xff; + if (!getenv("serial#")) { + snprintf(serial_string, sizeof(serial_string), + "%08x%08x", sid[0], sid[3]); - eth_setenv_enetaddr("ethaddr", mac_addr); + setenv("serial#", serial_string); + } } #if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET) -- cgit v1.2.1 From 8e2fc523a90c601b247c784452d71f5f5c709869 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 12 Apr 2015 22:22:18 +0200 Subject: sunxi: Removed dram files cleanup in MAINTAINERS A few dram files were still listed as maintained even though they were removed some time ago Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 3 --- 1 file changed, 3 deletions(-) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f368d6fa04..458d4e5181 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -42,13 +42,11 @@ F: configs/Ippo_q8h_v1_2_defconfig A20-OLINUXINO-LIME BOARD M: FUKAUMI Naoki S: Maintained -F: board/sunxi/dram_a20_olinuxino_l.c F: configs/A20-OLinuXino-Lime_defconfig A20-OLINUXINO-LIME2 BOARD M: Iain Paton S: Maintained -F: board/sunxi/dram_a20_olinuxino_l2.c F: configs/A20-OLinuXino-Lime2_defconfig AINOL AW1 BOARD @@ -92,7 +90,6 @@ F: configs/Hummingbird_A31_defconfig INET-86VS BOARD M: Michal Suchanek S: Maintained -F: board/sunxi/dram_inet_86vs.c F: configs/Inet_86VS_defconfig IPPO-Q8H-V5 BOARD -- cgit v1.2.1 From 1d1bce873387cb67bfff508d3b29f38ce0355baa Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 12 Apr 2015 22:22:19 +0200 Subject: sunxi: Proper iNet board config naming The official name for the iNet manufacturer is iNet with a lowercase i and an uppercase N. Signed-off-by: Paul Kocialkowski Acked-by: Michal Suchanek Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 458d4e5181..6e5142f0be 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -87,10 +87,10 @@ M: Chen-Yu Tsai S: Maintained F: configs/Hummingbird_A31_defconfig -INET-86VS BOARD +INET 86VS BOARD M: Michal Suchanek S: Maintained -F: configs/Inet_86VS_defconfig +F: configs/iNet_86VS_defconfig IPPO-Q8H-V5 BOARD M: Chen-Yu Tsai -- cgit v1.2.1 From 96fc68c2d525705d4acdafb4a75414dfd63867d2 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 12 Apr 2015 22:22:20 +0200 Subject: sunxi: iNet 3W support The iNet 3W is an A10 tablet with 1GiB RAM and a 1024x768 screen. Also see: http://linux-sunxi.org/INet_3W Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 6e5142f0be..b779d5246d 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -87,6 +87,11 @@ M: Chen-Yu Tsai S: Maintained F: configs/Hummingbird_A31_defconfig +INET 3W BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/iNet_3W_defconfig + INET 86VS BOARD M: Michal Suchanek S: Maintained -- cgit v1.2.1 From 1847c1da02be1692441d1bf8998b4a1528b9f868 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 12 Apr 2015 22:22:21 +0200 Subject: sunxi: iNet 3F support The iNet 3F is an A10 tablet with 1GiB RAM and a 1024x768 screen. Also see: http://linux-sunxi.org/INet_3F Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index b779d5246d..75e8b5ab4f 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -87,6 +87,11 @@ M: Chen-Yu Tsai S: Maintained F: configs/Hummingbird_A31_defconfig +INET 3F BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/iNet_3F_defconfig + INET 3W BOARD M: Paul Kocialkowski S: Maintained -- cgit v1.2.1 From 6c739c5d8a3466f8ef2f8543636484957bcca6ee Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 10 Apr 2015 23:09:52 +0200 Subject: sunxi: Complete i2c support for each supported platform Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/Kconfig | 38 ++++++++++++++++++++++++++ board/sunxi/board.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 113 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index ccc2080d8c..88e335836d 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -269,6 +269,44 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C0_ENABLE + bool "Enable I2C/TWI controller 0" + default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I + default n if MACH_SUN6I || MACH_SUN8I + ---help--- + This allows enabling I2C/TWI controller 0 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + See I2C0_ENABLE help text. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C0_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C0_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C0_ENABLE help text. +endif + config VIDEO boolean "Enable graphical uboot console on HDMI, LCD or VGA" default y diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 7633d65e6c..dda50b55a5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -276,9 +276,82 @@ int board_mmc_init(bd_t *bis) void i2c_init_board(void) { - sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB_TWI0); - sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB_TWI0); +#ifdef CONFIG_I2C0_ENABLE +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0); clock_twi_onoff(0, 1); +#elif defined(CONFIG_MACH_SUN6I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0); + sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0); + clock_twi_onoff(0, 1); +#elif defined(CONFIG_MACH_SUN8I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0); + sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0); + clock_twi_onoff(0, 1); +#endif +#endif + +#ifdef CONFIG_I2C1_ENABLE +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1); + clock_twi_onoff(1, 1); +#elif defined(CONFIG_MACH_SUN5I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1); + clock_twi_onoff(1, 1); +#elif defined(CONFIG_MACH_SUN6I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1); + clock_twi_onoff(1, 1); +#elif defined(CONFIG_MACH_SUN8I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1); + clock_twi_onoff(1, 1); +#endif +#endif + +#ifdef CONFIG_I2C2_ENABLE +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2); + sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2); + clock_twi_onoff(2, 1); +#elif defined(CONFIG_MACH_SUN5I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2); + sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2); + clock_twi_onoff(2, 1); +#elif defined(CONFIG_MACH_SUN6I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2); + sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2); + clock_twi_onoff(2, 1); +#elif defined(CONFIG_MACH_SUN8I) + sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2); + sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2); + clock_twi_onoff(2, 1); +#endif +#endif + +#ifdef CONFIG_I2C3_ENABLE +#if defined(CONFIG_MACH_SUN6I) + sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3); + sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3); + clock_twi_onoff(3, 1); +#elif defined(CONFIG_MACH_SUN7I) + sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3); + sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3); + clock_twi_onoff(3, 1); +#endif +#endif + +#ifdef CONFIG_I2C4_ENABLE +#if defined(CONFIG_MACH_SUN7I) + sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4); + sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4); + clock_twi_onoff(4, 1); +#endif +#endif + #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA); soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL); -- cgit v1.2.1