From 1bb61b69f7aba4931ede35fdcabd8e5ecad121d7 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 7 Aug 2009 13:16:34 -0500 Subject: xes: Use proper IO access functions Also fix some minor whitespace oddities while we're cleaning up Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- board/xes/common/fsl_8xxx_clk.c | 6 +++--- board/xes/common/fsl_8xxx_pci.c | 44 ++++++++++++++++++++--------------------- 2 files changed, 25 insertions(+), 25 deletions(-) (limited to 'board/xes/common') diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c index 0155670b94..f4a17b78c6 100644 --- a/board/xes/common/fsl_8xxx_clk.c +++ b/board/xes/common/fsl_8xxx_clk.c @@ -21,6 +21,7 @@ */ #include +#include /* * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config @@ -33,9 +34,8 @@ unsigned long get_board_sys_clk(ulong dummy) immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; #endif - u32 gpporcr = gur->gpporcr; - if (gpporcr & 0x10000) + if (in_be32(&gur->gpporcr) & 0x10000) return 66666666; else return 50000000; @@ -49,7 +49,7 @@ unsigned long get_board_sys_clk(ulong dummy) unsigned long get_board_ddr_clk(ulong dummy) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; if (ddr_ratio == 0x7) return get_board_sys_clk(dummy); diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c index 463588f68d..a615820651 100644 --- a/board/xes/common/fsl_8xxx_pci.c +++ b/board/xes/common/fsl_8xxx_pci.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -182,18 +183,18 @@ void pci_init_board(void) immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; #endif - uint devdisr = gur->devdisr; - uint io_sel = (gur->pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >> + uint devdisr = in_be32(&gur->devdisr); + uint io_sel = (in_be32(&gur->pordevsr) & MPC8xxx_PORDEVSR_IO_SEL) >> MPC8xxx_PORDEVSR_IO_SEL_SHIFT; - uint host_agent = (gur->porbmsr & MPC8xxx_PORBMSR_HA) >> + uint host_agent = (in_be32(&gur->porbmsr) & MPC8xxx_PORBMSR_HA) >> MPC8xxx_PORBMSR_HA_SHIFT; struct pci_region *r; #ifdef CONFIG_PCI1 - uint pci_spd_norm = (gur->pordevsr & MPC85xx_PORDEVSR_PCI1_SPD); - uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; - uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; - uint pcix = gur->pordevsr & MPC85xx_PORDEVSR_PCI1; + uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; + uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; + uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; + uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1; uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; width = 0; /* Silence compiler warning... */ @@ -203,12 +204,11 @@ void pci_init_board(void) host = host_agent_cfg[host_agent].pci_host[0]; r = hose->regions; - if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n", pci_32 ? 32 : 64, pcix ? "PCIX" : "PCI", - pci_spd_norm ? ">=" : "<=", + pci_spd_norm ? ">=" : "<=", pcix ? freq * 2 : freq, host ? "host" : "agent", pci_arb ? "arbiter" : "external-arbiter"); @@ -245,7 +245,7 @@ void pci_init_board(void) } #elif defined CONFIG_MPC8548 /* PCI1 not present on MPC8572 */ - gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */ + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); #endif #ifdef CONFIG_PCIE1 pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; @@ -257,10 +257,10 @@ void pci_init_board(void) if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) { printf("\n PCIE1 connected as %s (x%d)", host ? "Root Complex" : "End Point", width); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; + if (in_be32(&pci->pme_msg_det)) { + out_be32(&pci->pme_msg_det, 0xffffffff); debug(" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); + in_be32(&pci->pme_msg_det)); } printf("\n"); @@ -293,7 +293,7 @@ void pci_init_board(void) hose->first_busno, hose->last_busno); } #else - gur->devdisr |= MPC8xxx_DEVDISR_PCIE1; /* disable */ + setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 @@ -306,10 +306,10 @@ void pci_init_board(void) if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) { printf("\n PCIE2 connected as %s (x%d)", host ? "Root Complex" : "End Point", width); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; + if (in_be32(&pci->pme_msg_det)) { + out_be32(&pci->pme_msg_det, 0xffffffff); debug(" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); + in_be32(&pci->pme_msg_det)); } printf("\n"); @@ -342,7 +342,7 @@ void pci_init_board(void) hose->first_busno, hose->last_busno); } #else - gur->devdisr |= MPC8xxx_DEVDISR_PCIE2; /* disable */ + setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2); #endif /* CONFIG_PCIE2 */ #ifdef CONFIG_PCIE3 @@ -355,10 +355,10 @@ void pci_init_board(void) if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) { printf("\n PCIE3 connected as %s (x%d)", host ? "Root Complex" : "End Point", width); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; + if (in_be32(&pci->pme_msg_det)) { + out_be32(&pci->pme_msg_det, 0xffffffff); debug(" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); + in_be32(&pci->pme_msg_det)); } printf("\n"); @@ -391,7 +391,7 @@ void pci_init_board(void) hose->first_busno, hose->last_busno); } #else - gur->devdisr |= MPC8xxx_DEVDISR_PCIE3; /* disable */ + setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3); #endif /* CONFIG_PCIE3 */ } -- cgit v1.2.1