From 608c91460b37fd9fe0088a0ce813a443f116a8d5 Mon Sep 17 00:00:00 2001 From: wdenk Date: Mon, 13 Jan 2003 23:54:46 +0000 Subject: =?UTF-8?q?Add=20support=20for=20V37=20board=20(patch=20by=20J=F3n?= =?UTF-8?q?=20Benediktsson,=2011=20Dec=202002)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- board/v37/Makefile | 40 ++++ board/v37/config.mk | 27 +++ board/v37/flash.c | 559 +++++++++++++++++++++++++++++++++++++++++++++++++++ board/v37/u-boot.lds | 142 +++++++++++++ board/v37/v37.c | 218 ++++++++++++++++++++ 5 files changed, 986 insertions(+) create mode 100644 board/v37/Makefile create mode 100644 board/v37/config.mk create mode 100644 board/v37/flash.c create mode 100644 board/v37/u-boot.lds create mode 100644 board/v37/v37.c (limited to 'board/v37') diff --git a/board/v37/Makefile b/board/v37/Makefile new file mode 100644 index 0000000000..baecac914c --- /dev/null +++ b/board/v37/Makefile @@ -0,0 +1,40 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS = $(BOARD).o flash.o + +$(LIB): .depend $(OBJS) + $(AR) crv $@ $^ + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### diff --git a/board/v37/config.mk b/board/v37/config.mk new file mode 100644 index 0000000000..50cac972e1 --- /dev/null +++ b/board/v37/config.mk @@ -0,0 +1,27 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Marel V37 boards +# +TEXT_BASE = 0x40000000 diff --git a/board/v37/flash.c b/board/v37/flash.c new file mode 100644 index 0000000000..4de0e14757 --- /dev/null +++ b/board/v37/flash.c @@ -0,0 +1,559 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Yoo. Jonghoon, IPone, yooth@ipone.co.kr + * PPCboot port on RPXlite board + * + * Some of flash control words are modified. (from 2x16bit device + * to 4x8bit device) + * RPXLite board I tested has only 4 AM29LV800BB devices. Other devices + * are not tested. + * + * (?) Does an RPXLite board which + * does not use AM29LV800 flash memory exist ? + * I don't know... + */ + +#include +#include + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info); +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips); +static void flash_get_id_word( void *ptr, short *ptr_manuf, short *ptr_dev_id); +static void flash_get_id_long( void *ptr, short *ptr_manuf, short *ptr_dev_id); + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + unsigned long size_b0, size_b1; + short manu, dev_id; + int i; + + /* Init: no FLASHes known */ + for (i=0; imemc_or0 = CFG_OR_TIMING_FLASH | (0 - size_b0); + +#if CFG_MONITOR_BASE >= CFG_FLASH_BASE0 + /* monitor protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CFG_MONITOR_BASE, + CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, + &flash_info[0]); +#endif + + flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id); + + size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]); + + flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1); + + memctl->memc_or1 = CFG_OR_TIMING_FLASH | (0 - size_b1); + + flash_info[0].size = size_b0; + flash_info[1].size = size_b1; + + return (size_b0+size_b1); +} + +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips) +{ + int i, addr_shift; + vu_short *addr = (vu_short*)base; + + addr[0x555] = 0x00AA ; + addr[0xAAA] = 0x0055 ; + addr[0x555] = 0x0090 ; + + addr_shift = (two_chips ? 2 : 1 ); + + /* set up sector start address table */ + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + (0x00000000<start[1] = base + (0x00002000<start[2] = base + (0x00003000<start[3] = base + (0x00004000<sector_count; i++) { + info->start[i] = base + ((i-3) * (0x00008000<sector_count - 1; + info->start[i--] = base + info->size - (0x00002000<start[i--] = base + info->size - (0x00003000<start[i--] = base + info->size - (0x00004000<= 0; i--) { + info->start[i] = base + i * (0x00008000<sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr = (vu_short *)(info->start[i]); + info->protect[i] = addr[1<start[0]; + *addr = 0xF0F0; /* reset bank */ +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t *info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: printf ("AMD "); break; + case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_TOSH: printf ("TOSHIBA "); break; + default: printf ("Unknown Vendor "); break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + default: printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i=0; isector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", + info->start[i], + info->protect[i] ? " (RO)" : " " + ); + } + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ + +static void flash_get_id_word( void *ptr, short *ptr_manuf, short *ptr_dev_id) +{ + vu_short *addr = (vu_short*)ptr; + + addr[0x555] = 0x00AA ; + addr[0xAAA] = 0x0055 ; + addr[0x555] = 0x0090 ; + + *ptr_manuf = addr[0]; + *ptr_dev_id = addr[1]; + + addr[0] = 0xf0f0; /* return to normal */ +} + +static void flash_get_id_long( void *ptr, short *ptr_manuf, short *ptr_dev_id) +{ + vu_short *addr = (vu_short*)ptr; + vu_short *addr1, *addr2, *addr3; + + addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); + addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) ); + addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); + + *addr1 = 0xAAAA; + *addr2 = 0x5555; + *addr3 = 0x9090; + + *ptr_manuf = addr[0]; + *ptr_dev_id = addr[2]; + + addr[0] = 0xf0f0; /* return to normal */ +} + +static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info) +{ + switch (manu) { + case ((short)AMD_MANUFACT): + info->flash_id = FLASH_MAN_AMD; + break; + case ((short)FUJ_MANUFACT): + info->flash_id = FLASH_MAN_FUJ; + break; + case ((short)TOSH_MANUFACT): + info->flash_id = FLASH_MAN_TOSH; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } + + + switch (dev_id) { + case ((short)TOSH_ID_FVT160): + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 1 MB */ + + case ((short)TOSH_ID_FVB160): + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 1 MB */ + + case ((short)AMD_ID_LV400T): + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case ((short)AMD_ID_LV400B): + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case ((short)AMD_ID_LV800T): + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00200000; + break; /* => 2 MB */ + + case ((short)AMD_ID_LV800B): + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00400000; //%%% Size doubled by yooth + break; /* => 4 MB */ + + case ((short)AMD_ID_LV160T): + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 4 MB */ + + case ((short)AMD_ID_LV160B): + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 4 MB */ + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + + } + + return(info->size); +} + + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t *info, int s_first, int s_last) +{ + vu_short *addr = (vu_short*)(info->start[0]); + int flag, prot, sect, l_sect; + ulong start, now, last; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + if ((info->flash_id == FLASH_UNKNOWN) || + (info->flash_id > FLASH_AMD_COMP)) { + printf ("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return 1; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + l_sect = -1; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + addr[0x555] = (vu_short)0xAAAAAAAA; + addr[0xAAA] = (vu_short)0x55555555; + addr[0x555] = (vu_short)0x80808080; + addr[0x555] = (vu_short)0xAAAAAAAA; + addr[0xAAA] = (vu_short)0x55555555; + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr = (vu_short *)(info->start[sect]) ; + addr[0] = (vu_short)0x30303030 ; + l_sect = sect; + } + } + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (vu_short *)(info->start[l_sect]); + while ((addr[0] & 0x8080) != 0x8080) { + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } + } + +DONE: + /* reset to read mode */ + addr = (vu_short *)info->start[0]; + addr[0] = (vu_short)0xF0F0F0F0; /* reset bank */ + + printf (" done\n"); + return 0; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp, data; + int i, l, rc; + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + return (write_word(info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ + vu_short *addr = (vu_short *)(info->start[0]); + vu_short sdata; + + ulong start; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*((vu_long *)dest) & data) != data) { + return (2); + } + + /* First write upper 16 bits */ + sdata = (short)(data>>16); + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + addr[0x555] = 0xAAAA; + addr[0xAAA] = 0x5555; + addr[0x555] = 0xA0A0; + + *((vu_short *)dest) = sdata; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((*((vu_short *)dest) & 0x8080) != (sdata & 0x8080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + + /* Now write lower 16 bits */ + sdata = (short)(data&0xffff); + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + addr[0x555] = 0xAAAA; + addr[0xAAA] = 0x5555; + addr[0x555] = 0xA0A0; + + *((vu_short *)dest + 1) = sdata; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((*((vu_short *)dest + 1) & 0x8080) != (sdata & 0x8080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + return (0); +} + +/*----------------------------------------------------------------------- + */ diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds new file mode 100644 index 0000000000..4db2e45113 --- /dev/null +++ b/board/v37/u-boot.lds @@ -0,0 +1,142 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc8xx/start.o (.text) + cpu/mpc8xx/traps.o (.text) + common/dlmalloc.o (.text) + lib_ppc/ppcstring.o (.text) + lib_generic/vsprintf.o (.text) + lib_generic/crc32.o (.text) + lib_generic/zlib.o (.text) + lib_ppc/cache.o (.text) + lib_ppc/time.o (.text) + +/* + . = env_offset; +*/ + common/environment.o (.ppcenv) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} + + + + + diff --git a/board/v37/v37.c b/board/v37/v37.c new file mode 100644 index 0000000000..764aff7916 --- /dev/null +++ b/board/v37/v37.c @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Yoo. Jonghoon, IPone, yooth@ipone.co.kr + * PPCboot port on RPXlite board + * + * DRAM related UPMA register values are modified. + * See RPXLite engineering note : 50MHz/60ns - UPM RAM WORDS + */ + +#include +#include "mpc8xx.h" + +/* ------------------------------------------------------------------------- */ + +static long int dram_size (void); + +/* ------------------------------------------------------------------------- */ + +#define MBYTE (1024*1024) +#define DRAM_DELAY 0x00000379 /* DRAM delay count */ +#define _NOT_USED_ 0xFFFFCC25 + +const uint sdram_table[] = +{ + /* single read. (offset 0 in upm RAM) */ + 0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000, + 0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, + + /* burst read. (Offset 8 in upm RAM) */ + 0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000, + 0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + + /* single write. (Offset 0x18 in upm RAM) */ + 0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + + /* burst write. (Offset 0x20 in upm RAM) */ + 0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000, + 0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + + /* Refresh cycle, offset 0x30 */ + 0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, + 0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + + /* Exception, 0ffset 0x3C */ + 0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, +}; +/* ------------------------------------------------------------------------- */ + + +/* + * Check Board Identity: + * + * Return 1 for now. + * + */ + +int checkboard (void) +{ + printf("Marel V37\n") ; + return (0) ; +} + +/* ------------------------------------------------------------------------- */ + +long int initdram (int board_type) +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + unsigned long temp; + volatile int delay_cnt; + long int ramsize; + + ramsize = dram_size(); + + /* Refresh clock prescalar */ + memctl->memc_mptpr = 0x400 ; + + if( ramsize == 32*MBYTE ) + temp = 0xd0904110; + else /* 16MB */ + temp = 0xd0802110; + + memctl->memc_mbmr = temp; + + upmconfig(UPMB, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); + + /* Map controller banks 2 to the SDRAM bank */ + memctl->memc_or2 = 0xA00 | (0 - ramsize); + memctl->memc_br2 = 0xC1; + + memctl->memc_mbmr = temp | 0x08; + memctl->memc_mcr = 0x80804130; + + delay_cnt = 0; + while( delay_cnt++ < DRAM_DELAY ) + ; + + /* Run MRS command in location 5-8 of UPMB */ + + memctl->memc_mbmr = temp | 0x04; + memctl->memc_mar = 0x88; + + memctl->memc_mcr = 0x80804105; + + delay_cnt = 0; + while( delay_cnt++ < DRAM_DELAY ) + ; + +#ifdef CONFIG_CAN_DRIVER + /* Initialize OR3 / BR3 */ + memctl->memc_or3 = CFG_OR3_CAN; + memctl->memc_br3 = CFG_BR3_CAN; + + /* Initialize MBMR */ + memctl->memc_mamr = MAMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */ + + /* Initialize UPMB for CAN: single read */ + memctl->memc_mdr = 0xFFFFC004; + memctl->memc_mcr = 0x0100 | UPMA; + + memctl->memc_mdr = 0x0FFFD004; + memctl->memc_mcr = 0x0101 | UPMA; + + memctl->memc_mdr = 0x0FFFC000; + memctl->memc_mcr = 0x0102 | UPMA; + + memctl->memc_mdr = 0x3FFFC004; + memctl->memc_mcr = 0x0103 | UPMA; + + memctl->memc_mdr = 0xFFFFDC05; + memctl->memc_mcr = 0x0104 | UPMA; + + /* Initialize UPMB for CAN: single write */ + memctl->memc_mdr = 0xFFFCC004; + memctl->memc_mcr = 0x0118 | UPMA; + + memctl->memc_mdr = 0xCFFCD004; + memctl->memc_mcr = 0x0119 | UPMA; + + memctl->memc_mdr = 0x0FFCC000; + memctl->memc_mcr = 0x011A | UPMA; + + memctl->memc_mdr = 0x7FFCC004; + memctl->memc_mcr = 0x011B | UPMA; + + memctl->memc_mdr = 0xFFFDCC05; + memctl->memc_mcr = 0x011C | UPMA; +#endif /* CONFIG_CAN_DRIVER */ + + return (dram_size()); +} + +/* ------------------------------------------------------------------------- */ + +/* + * Find size of RAM from configuration pins. + * The input pins that contain the memory size are also the debug port + * pins. Normally they are configured as debug port pins. To be able + * to read the memory configuration, we must deactivate the debug port + * and enable the pcmcia input pins. Then return the register to + * previous state. + */ + +static long int dram_size () +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile sysconf8xx_t *siu = &immap->im_siu_conf; + volatile pcmconf8xx_t *pcm = &immap->im_pcmcia; + long int i, memory=1; + unsigned long siu_mcr; + + siu_mcr = siu->sc_siumcr; + siu->sc_siumcr = siu_mcr & 0xFF9FFFFF; + for(i=0; i<10; i++) i = i; + + memory = (pcm->pcmc_pipr>>12) & 0x3; + + siu->sc_siumcr = siu_mcr; + + switch( memory ) + { + case 1: + return( 32*MBYTE ); + case 2: + return( 64*MBYTE ); + default: + break; + } + return( 16*MBYTE ); +} -- cgit v1.2.1