From dc0b2fb4a76315fd1df720e11782ead832434e68 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 15 Dec 2014 23:26:24 +0900 Subject: mpc8260: remove PM825, PM826, PM828 board support These boards are still non-generic boards. Signed-off-by: Masahiro Yamada Cc: Wolfgang Denk --- board/pm828/Kconfig | 9 -- board/pm828/MAINTAINERS | 9 -- board/pm828/Makefile | 8 -- board/pm828/flash.c | 370 ------------------------------------------------ board/pm828/pm828.c | 352 --------------------------------------------- 5 files changed, 748 deletions(-) delete mode 100644 board/pm828/Kconfig delete mode 100644 board/pm828/MAINTAINERS delete mode 100644 board/pm828/Makefile delete mode 100644 board/pm828/flash.c delete mode 100644 board/pm828/pm828.c (limited to 'board/pm828') diff --git a/board/pm828/Kconfig b/board/pm828/Kconfig deleted file mode 100644 index e7970a30bb..0000000000 --- a/board/pm828/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_PM828 - -config SYS_BOARD - default "pm828" - -config SYS_CONFIG_NAME - default "PM828" - -endif diff --git a/board/pm828/MAINTAINERS b/board/pm828/MAINTAINERS deleted file mode 100644 index 97c1ccc595..0000000000 --- a/board/pm828/MAINTAINERS +++ /dev/null @@ -1,9 +0,0 @@ -PM828 BOARD -#M: - -S: Maintained -F: board/pm828/ -F: include/configs/PM828.h -F: configs/PM828_defconfig -F: configs/PM828_PCI_defconfig -F: configs/PM828_ROMBOOT_defconfig -F: configs/PM828_ROMBOOT_PCI_defconfig diff --git a/board/pm828/Makefile b/board/pm828/Makefile deleted file mode 100644 index 0afffb7bc6..0000000000 --- a/board/pm828/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = pm828.o flash.o diff --git a/board/pm828/flash.c b/board/pm828/flash.c deleted file mode 100644 index 8888560b62..0000000000 --- a/board/pm828/flash.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Flash Routines for Intel devices - * - *-------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -/*----------------------------------------------------------------------- - */ -ulong flash_get_size (volatile unsigned long *baseaddr, - flash_info_t * info) -{ - short i; - unsigned long flashtest_h, flashtest_l; - - info->sector_count = info->size = 0; - info->flash_id = FLASH_UNKNOWN; - - /* Write query command sequence and test FLASH answer - */ - baseaddr[0] = 0x00980098; - baseaddr[1] = 0x00980098; - - flashtest_h = baseaddr[0]; /* manufacturer ID */ - flashtest_l = baseaddr[1]; - - if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT) - return (0); /* no or unknown flash */ - - flashtest_h = baseaddr[2]; /* device ID */ - flashtest_l = baseaddr[3]; - - if (flashtest_h != flashtest_l) - return (0); - - switch (flashtest_h) { - case INTEL_ID_28F160C3B: - info->flash_id = FLASH_28F160C3B; - info->sector_count = 39; - info->size = 0x00800000; /* 4 * 2 MB = 8 MB */ - break; - case INTEL_ID_28F160F3B: - info->flash_id = FLASH_28F160F3B; - info->sector_count = 39; - info->size = 0x00800000; /* 4 * 2 MB = 8 MB */ - break; - case INTEL_ID_28F640C3B: - info->flash_id = FLASH_28F640C3B; - info->sector_count = 135; - info->size = 0x02000000; /* 16 * 2 MB = 32 MB */ - break; - default: - return (0); /* no or unknown flash */ - } - - info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */ - - if (info->flash_id & FLASH_BTYPE) { - volatile unsigned long *tmp = baseaddr; - - /* set up sector start adress table (bottom sector type) - * AND unlock the sectors (if our chip is 160C3 or 640c3) - */ - for (i = 0; i < info->sector_count; i++) { - if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) || - ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) { - tmp[0] = 0x00600060; - tmp[1] = 0x00600060; - tmp[0] = 0x00D000D0; - tmp[1] = 0x00D000D0; - } - info->start[i] = (uint) tmp; - tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith */ - } - } - - memset (info->protect, 0, info->sector_count); - - baseaddr[0] = 0x00FF00FF; - baseaddr[1] = 0x00FF00FF; - - return (info->size); -} - -/*----------------------------------------------------------------------- - */ -unsigned long flash_init (void) -{ - unsigned long size_b0 = 0; - int i; - - /* Init: no FLASHes known - */ - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - } - - /* Static FLASH Bank configuration here (only one bank) */ - - size_b0 = flash_get_size ((ulong *) CONFIG_SYS_FLASH0_BASE, &flash_info[0]); - if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size_b0, size_b0 >> 20); - } - - /* protect monitor and environment sectors - */ - -#ifndef CONFIG_BOOT_ROM - /* If U-Boot is booted from ROM the CONFIG_SYS_MONITOR_BASE > CONFIG_SYS_FLASH0_BASE - * but we shouldn't protect it. - */ - -# if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0] - ); -# endif -#endif /* CONFIG_BOOT_ROM */ - -#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) -# ifndef CONFIG_ENV_SIZE -# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -# endif - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); -#endif - - return (size_b0); -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch ((info->flash_id >> 16) & 0xff) { - case 0x89: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F160C3B: - printf ("28F160C3B (16 M, bottom sector)\n"); - break; - case FLASH_28F160F3B: - printf ("28F160F3B (16 M, bottom sector)\n"); - break; - case FLASH_28F640C3B: - printf ("28F640C3B (64 M, bottom sector)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " " - ); - } - printf ("\n"); -} - -/*----------------------------------------------------------------------- - */ -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong start, now, last; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect]) - prot++; - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Start erase on unprotected sectors - */ - for (sect = s_first; sect <= s_last; sect++) { - volatile ulong *addr = - (volatile unsigned long *) info->start[sect]; - - start = get_timer (0); - last = start; - if (info->protect[sect] == 0) { - /* Disable interrupts which might cause a timeout here - */ - flag = disable_interrupts (); - - /* Erase the block - */ - addr[0] = 0x00200020; - addr[1] = 0x00200020; - addr[0] = 0x00D000D0; - addr[1] = 0x00D000D0; - - /* re-enable interrupts if necessary - */ - if (flag) - enable_interrupts (); - - /* wait at least 80us - let's wait 1 ms - */ - udelay (1000); - - last = start; - while ((addr[0] & 0x00800080) != 0x00800080 || - (addr[1] & 0x00800080) != 0x00800080) { - if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout (erase suspended!)\n"); - /* Suspend erase - */ - addr[0] = 0x00B000B0; - addr[1] = 0x00B000B0; - goto DONE; - } - /* show that we're waiting - */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } - } - if (addr[0] & 0x00220022 || addr[1] & 0x00220022) { - printf ("*** ERROR: erase failed!\n"); - goto DONE; - } - } - /* Clear status register and reset to read mode - */ - addr[0] = 0x00500050; - addr[1] = 0x00500050; - addr[0] = 0x00FF00FF; - addr[1] = 0x00FF00FF; - } - - printf (" done\n"); - -DONE: - return 0; -} - -static int write_word (flash_info_t *, volatile unsigned long *, ulong); - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong v; - int i, l, cc = cnt, res = 0; - - - for (v=0; cc > 0; addr += 4, cc -= 4 - l) { - l = (addr & 3); - addr &= ~3; - - for (i = 0; i < 4; i++) { - v = (v << 8) + (i < l || i - l >= cc ? - *((unsigned char *) addr + i) : *src++); - } - - if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0) - break; - } - - return (res); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word (flash_info_t * info, volatile unsigned long *addr, - ulong data) -{ - int flag, res = 0; - ulong start; - - /* Check if Flash is (sufficiently) erased - */ - if ((*addr & data) != data) - return (2); - - /* Disable interrupts which might cause a timeout here - */ - flag = disable_interrupts (); - - *addr = 0x00400040; - *addr = data; - - /* re-enable interrupts if necessary - */ - if (flag) - enable_interrupts (); - - start = get_timer (0); - while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - /* Suspend program - */ - *addr = 0x00B000B0; - res = 1; - goto OUT; - } - } - - if (*addr & 0x00220022) { - printf ("*** ERROR: program failed!\n"); - res = 1; - } - -OUT: - /* Clear status register and reset to read mode - */ - *addr = 0x00500050; - *addr = 0x00FF00FF; - - return (res); -} diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c deleted file mode 100644 index f446543fed..0000000000 --- a/board/pm828/pm828.c +++ /dev/null @@ -1,352 +0,0 @@ -/* - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include - -/* - * I/O Port configuration table - * - * if conf is 1, then that port pin will be configured at boot time - * according to the five values podr/pdir/ppar/psor/pdat for that entry - */ - -const iop_conf_t iop_conf_tab[4][32] = { - - /* Port A configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */ - /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ - /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ - /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ - /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ - /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ - /* PA25 */ { 0, 0, 0, 1, 0, 0 }, /* PA25 */ - /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* PA24 */ - /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */ - /* PA22 */ { 0, 0, 0, 1, 0, 0 }, /* PA22 */ - /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ - /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ - /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ - /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ - /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ - /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1*/ - /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ - /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ - /* PA13 */ { 0, 0, 0, 1, 0, 0 }, /* PA13 */ - /* PA12 */ { 0, 0, 0, 1, 0, 0 }, /* PA12 */ - /* PA11 */ { 0, 0, 0, 1, 0, 0 }, /* PA11 */ - /* PA10 */ { 0, 0, 0, 1, 0, 0 }, /* PA10 */ - /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* PA9 */ - /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* PA8 */ - /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */ - /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */ - /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */ - /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */ - /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */ - /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ - /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */ - /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ - }, - - /* Port B configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 TX_EN */ -#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1) -#ifdef CONFIG_ETHER_ON_FCC2 -#error "SCC1 conflicts with FCC2" -#endif - /* PB28 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */ -#else - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_ER */ -#endif - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[3] */ - /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */ - /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */ - /* PB15 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */ - /* PB14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */ - /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */ - /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */ - /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */ - /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */ - /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */ - /* PB8 */ { 1, 1, 1, 1, 0, 0 }, /* SCC3 TXD */ - /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */ - /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */ - /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */ - /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */ - /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - }, - - /* Port C */ - { /* conf ppar psor pdir podr pdat */ - /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ - /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ - /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 CTS */ - /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 CTS */ - /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* PC27 */ - /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ - /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */ - /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* PC23 */ - /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK */ - /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXCK */ - /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK(2) */ - /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RXCK */ - /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 TXCK */ - /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */ - /* PC16 */ { 0, 0, 0, 1, 0, 0 }, /* PC16 */ - /* PC15 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */ - /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 DCD */ - /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */ - /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 DCD */ - /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 CTS */ - /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 DCD */ - /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 CTS */ - /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 DCD */ - /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ - /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ - /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */ - /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */ - /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */ - /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* PC2 */ - /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* PC1 */ - /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* PC0 */ - }, - - /* Port D */ - { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */ - /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* PD30 */ - /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 RTS */ - /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */ - /* PD27 */ { 0, 1, 0, 1, 0, 0 }, /* SCC2 RTS */ - /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */ - /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */ - /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */ - /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 RTS */ - /* PD22 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 RXD */ - /* PD21 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4 TXD */ - /* PD20 */ { 0, 0, 1, 1, 0, 0 }, /* SCC4 RTS */ - /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ - /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ - /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */ - /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SYS_I2C_SOFT) - /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ - /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ -#else -#if defined(CONFIG_HARD_I2C) - /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */ - /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */ -#else /* normal I/O port pins */ - /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */ - /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */ -#endif -#endif - /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ - /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ - /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ - /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ - /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* PD9 */ - /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ - /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ - /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ - /* PD4 */ { 1, 1, 1, 0, 0, 0 }, /* SMC2 RXD */ - /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - } -}; - -/* ------------------------------------------------------------------------- */ - -/* Check Board Identity: - */ -int checkboard (void) -{ - puts ("Board: PM828\n"); - return 0; -} - -/* ------------------------------------------------------------------------- */ - - -/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx - * - * This routine performs standard 8260 initialization sequence - * and calculates the available memory size. It may be called - * several times to try different SDRAM configurations on both - * 60x and local buses. - */ -static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, - ulong orx, volatile uchar * base) -{ - volatile uchar c = 0xff; - volatile ulong cnt, val; - volatile ulong *addr; - volatile uint *sdmr_ptr; - volatile uint *orx_ptr; - int i; - ulong save[32]; /* to make test non-destructive */ - ulong maxsize; - - /* We must be able to test a location outsize the maximum legal size - * to find out THAT we are outside; but this address still has to be - * mapped by the controller. That means, that the initial mapping has - * to be (at least) twice as large as the maximum expected size. - */ - maxsize = (1 + (~orx | 0x7fff)) / 2; - - sdmr_ptr = &memctl->memc_psdmr; - orx_ptr = &memctl->memc_or2; - - *orx_ptr = orx; - - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. - */ - - *sdmr_ptr = sdmr | PSDMR_OP_PREA; - *base = c; - - *sdmr_ptr = sdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++) - *base = c; - - *sdmr_ptr = sdmr | PSDMR_OP_MRW; - *(base + CONFIG_SYS_MRS_OFFS) = c; /* setting MR on address lines */ - - *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *base = c; - - /* - * Check memory range for valid RAM. A simple memory test determines - * the actually available RAM size between addresses `base' and - * `base + maxsize'. Some (not all) hardware errors are detected: - * - short between address lines - * - short between data lines - */ - i = 0; - for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) { - addr = (volatile ulong *) base + cnt; /* pointer arith! */ - save[i++] = *addr; - *addr = ~cnt; - } - - addr = (volatile ulong *) base; - save[i] = *addr; - *addr = 0; - - if ((val = *addr) != 0) { - *addr = save[i]; - return (0); - } - - for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) { - addr = (volatile ulong *) base + cnt; /* pointer arith! */ - val = *addr; - *addr = save[--i]; - if (val != ~cnt) { - /* Write the actual size to ORx - */ - *orx_ptr = orx | ~(cnt * sizeof (long) - 1); - return (cnt * sizeof (long)); - } - } - return (maxsize); -} - - -phys_size_t initdram (int board_type) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - -#ifndef CONFIG_SYS_RAMBOOT - ulong size8, size9; -#endif - ulong psize = 32 * 1024 * 1024; - - memctl->memc_psrt = CONFIG_SYS_PSRT; - memctl->memc_mptpr = CONFIG_SYS_MPTPR; - -#ifndef CONFIG_SYS_RAMBOOT - size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL, - (uchar *) CONFIG_SYS_SDRAM_BASE); - size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR2_9COL, - (uchar *) CONFIG_SYS_SDRAM_BASE); - - if (size8 < size9) { - psize = size9; - printf ("(60x:9COL) "); - } else { - psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL, - (uchar *) CONFIG_SYS_SDRAM_BASE); - printf ("(60x:8COL) "); - } -#endif - return (psize); -} - -#if defined(CONFIG_CMD_DOC) -void doc_init (void) -{ - doc_probe (CONFIG_SYS_DOC_BASE); -} -#endif - -#ifdef CONFIG_PCI -struct pci_controller hose; - -extern void pci_mpc8250_init(struct pci_controller *); - -void pci_init_board(void) -{ - pci_mpc8250_init(&hose); -} -#endif - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} -- cgit v1.2.1