From 877bfe37dc00b0ae59f37742954a62bce3fdf3a0 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Fri, 18 Oct 2013 11:47:24 +0200 Subject: mpc85xx: introduce the kmp204x reference design support This patch introduces the support for Keymile's kmp204x reference design. This design is based on Freescale's P2040/P2041 SoC. The peripherals used by this design are: - DDR3 RAM with SPD support - SPI NOR Flash as boot medium - NAND Flash - 2 PCIe busses (hosts 1 and 3) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt FPGA - 2 HW I2C busses - last but not least, the mandatory serial port The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb support and was changed according to our design (that means essentially removing what is not present on the designs and a few adaptations). There is currently only one prototype board that is based on this design and this patch also introduces it. The board is called kmlion1. Signed-off-by: Stefan Bigler Signed-off-by: Valentin Longchamp kmp204x: update the ENV #define The comments had to be refined as well as the total size Signed-off-by: Valentin Longchamp [York Sun: fix ddr.c] Acked-by: York Sun --- board/keymile/kmp204x/pci.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 board/keymile/kmp204x/pci.c (limited to 'board/keymile/kmp204x/pci.c') diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c new file mode 100644 index 0000000000..ec20c8afb4 --- /dev/null +++ b/board/keymile/kmp204x/pci.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2013 Keymile AG + * Valentin Longchamp + * + * Copyright 2007-2011 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "kmp204x.h" + +#define PCIE_SW_RST 14 +#define HOOPER_SW_RST 12 + +void pci_init_board(void) +{ + qrio_prst(PCIE_SW_RST, false, false); + qrio_prst(HOOPER_SW_RST, false, false); + /* Hooper is not direcly PCIe capable */ + mdelay(50); + fsl_pcie_init_board(0); +} + +void pci_of_setup(void *blob, bd_t *bd) +{ + FT_FSL_PCI_SETUP; +} -- cgit v1.2.1