From 19a5ef60bb209f85ee2f61e99b65c321843b2316 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 29 Jan 2016 13:54:53 +0000 Subject: malta: Set I/O port base early Set the I/O port base earlier, from board_early_init_f, in preparation for it being used by the serial driver. Signed-off-by: Paul Burton --- board/imgtec/malta/malta.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'board/imgtec/malta/malta.c') diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index cae4a21c3d..6f4aebc9c9 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -146,6 +146,8 @@ int board_early_init_f(void) return -1; } + set_io_port_base((ulong)io_base); + /* setup FDC37M817 super I/O controller */ malta_superio_init(io_base); @@ -179,8 +181,6 @@ void pci_init_board(void) switch (malta_sys_con()) { case SYSCON_GT64120: - set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE)); - gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE), 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, 0x10000000, 0x10000000, 128 * 1024 * 1024, @@ -189,8 +189,6 @@ void pci_init_board(void) default: case SYSCON_MSC01: - set_io_port_base(CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE)); - msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE), 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, MALTA_MSC01_PCIMEM_MAP, -- cgit v1.2.1