From 676c66918a41f32b768abe1cb9fcb5f475682935 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Fri, 8 Feb 2013 00:03:44 +0000 Subject: mpc512x: use common code for CSx configuration Remove CSx configurations from board code and only define required CSx macros in the board config file to configure chip select windows and parameters. Signed-off-by: Anatolij Gustschin Cc: Reinhard Arlt Cc: Wolfgang Denk --- board/freescale/mpc5121ads/mpc5121ads.c | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'board/freescale/mpc5121ads/mpc5121ads.c') diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 97eeab3a23..4b58dbcba9 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -84,18 +84,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) int board_early_init_f(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - u32 spridr; - - /* - * Initialize Local Window for the CPLD registers access (CS2 selects - * the CPLD chip) - */ - out_be32(&im->sysconf.lpcs2aw, - CSAW_START(CONFIG_SYS_CPLD_BASE) | - CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE) - ); - out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); - sync_law(&im->sysconf.lpcs2aw); /* * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control @@ -114,15 +102,6 @@ int board_early_init_f(void) out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32); } #endif - /* - * Configure Flash Speed - */ - out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); - - spridr = in_be32(&im->sysconf.spridr); - - if (SVR_MJREV (spridr) >= 2) - out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); /* * Enable clocks -- cgit v1.2.1