From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/freescale/m5271evb/m5271evb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'board/freescale/m5271evb/m5271evb.c') diff --git a/board/freescale/m5271evb/m5271evb.c b/board/freescale/m5271evb/m5271evb.c index e089d5f02f..5505cc42c6 100644 --- a/board/freescale/m5271evb/m5271evb.c +++ b/board/freescale/m5271evb/m5271evb.c @@ -66,7 +66,7 @@ phys_size_t initdram (int board_type) { * PS: 32bit port size */ mbar_writeLong(MCF_SDRAMC_DACR0, - MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18) + MCF_SDRAMC_DACRn_BA(CONFIG_SYS_SDRAM_BASE>>18) | MCF_SDRAMC_DACRn_CASL(1) | MCF_SDRAMC_DACRn_CBM(3) | MCF_SDRAMC_DACRn_PS(0)); @@ -85,7 +85,7 @@ phys_size_t initdram (int board_type) { asm(" nop"); /* Write to this block to initiate precharge */ - *(u32 *)(CFG_SDRAM_BASE) = 0xa5a5a5a5; + *(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5; /* Set RE bit in DACR */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) @@ -108,10 +108,10 @@ phys_size_t initdram (int board_type) { * Burst Type = Sequential * Burst Length = 1 */ - *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xa5a5a5a5; + *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xa5a5a5a5; } - return CFG_SDRAM_SIZE * 1024 * 1024; + return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; }; int testdram (void) { -- cgit v1.2.1