From d1c3b27525b664e8c4db6bb173eed51bfc8220de Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 9 Sep 2009 16:25:29 +0200 Subject: ppc4xx: Big cleanup of PPC4xx defines This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese --- board/esd/pmc405/pmc405.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'board/esd/pmc405') diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 192a642aea..5ff87e7a25 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -60,12 +60,12 @@ int board_early_init_f (void) * EBC Configuration Register: * set ready timeout to 512 ebc-clks -> ca. 15 us */ - mtebc (epcr, 0xa8400000); + mtebc (EBC0_CFG, 0xa8400000); /* * Setup GPIO pins */ - mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_FPGA_INIT | + mtdcr(CPC0_CR0, mfdcr(CPC0_CR0) | ((CONFIG_SYS_FPGA_INIT | CONFIG_SYS_FPGA_DONE | CONFIG_SYS_XEREADY | CONFIG_SYS_NONMONARCH | @@ -73,7 +73,7 @@ int board_early_init_f (void) if (!(in_be32((void *)GPIO0_IR) & CONFIG_SYS_REV1_2)) { /* rev 1.2 boards */ - mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_INTA_FAKE | + mtdcr(CPC0_CR0, mfdcr(CPC0_CR0) | ((CONFIG_SYS_INTA_FAKE | CONFIG_SYS_SELF_RST) << 5)); } -- cgit v1.2.1