From b14fff8dce55e474c2de47d1722e3ae58546f5c4 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 2 Jun 2010 19:30:15 -0400 Subject: Blackfin: cm-bf548: convert to portmux framework Rather than bang MMRs directly, use the new portmux framework to handle the details. Signed-off-by: Mike Frysinger --- board/cm-bf548/cm-bf548.c | 55 +++++++---------------------------------------- board/cm-bf548/video.c | 33 ++++++++++++---------------- 2 files changed, 22 insertions(+), 66 deletions(-) (limited to 'board/cm-bf548') diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c index 3627586b69..90ce4c3eb7 100644 --- a/board/cm-bf548/cm-bf548.c +++ b/board/cm-bf548/cm-bf548.c @@ -11,6 +11,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -23,53 +24,13 @@ int checkboard(void) int board_early_init_f(void) { - /* Port H: PH8 - PH13 == A4 - A9 - * address lines of the parallel asynchronous memory interface - */ - - /************************************************ - * configure GPIO * - * set port H function enable register * - * configure PH8-PH13 as peripheral (not GPIO) * - *************************************************/ - bfin_write_PORTH_FER(0x3F03); - - /************************************************ - * set port H MUX to configure PH8-PH13 * - * 1st Function (MUX = 00) (bits 16-27 == 0) * - * Set to address signals A4-A9 * - *************************************************/ - bfin_write_PORTH_MUX(0); - - /************************************************ - * set port H direction register * - * enable PH8-PH13 as outputs * - *************************************************/ - bfin_write_PORTH_DIR_SET(0x3F00); - - /* Port I: PI0 - PH14 == A10 - A24 - * address lines of the parallel asynchronous memory interface - */ - - /************************************************ - * set port I function enable register * - * configure PI0-PI14 as peripheral (not GPIO) * - *************************************************/ - bfin_write_PORTI_FER(0x7fff); - - /************************************************** - * set PORT I MUX to configure PI14-PI0 as * - * 1st Function (MUX=00) - address signals A10-A24 * - ***************************************************/ - bfin_write_PORTI_MUX(0); - - /**************************************** - * set PORT I direction register * - * enable PI0 - PI14 as outputs * - *****************************************/ - bfin_write_PORTI_DIR_SET(0x7fff); - - return 0; + /* Set async addr lines as peripheral */ + const unsigned short pins[] = { + P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, + P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, + P_A21, P_A22, P_A23, P_A24, 0 + }; + return peripheral_request_list(pins, "async"); } int board_eth_init(bd_t *bis) diff --git a/board/cm-bf548/video.c b/board/cm-bf548/video.c index 4097f09e11..d43f5a1dfc 100644 --- a/board/cm-bf548/video.c +++ b/board/cm-bf548/video.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include #include #include @@ -174,28 +176,21 @@ void Init_DMA(void *dst) void Init_Ports(void) { - *pPORTF_MUX = 0x00000000; - *pPORTF_FER |= 0xFFFF; /* PPI0..15 */ - - *pPORTG_MUX &= - ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | - PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK); - *pPORTG_FER |= PG0 | PG1 | PG2 | PG3 | PG4; /* CLK, FS1, FS2, PPI16..17 */ - + const unsigned short pins[] = { + P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, P_PPI0_D4, + P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, + P_PPI0_D10, P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, + P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, #if !defined(CONFIG_VIDEO_RGB666) - *pPORTD_MUX &= - ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | - PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK); - *pPORTD_MUX |= - (PORT_x_MUX_0_FUNC_4 | PORT_x_MUX_1_FUNC_4 | PORT_x_MUX_2_FUNC_4 | - PORT_x_MUX_3_FUNC_4 | PORT_x_MUX_4_FUNC_4 | PORT_x_MUX_5_FUNC_4); - *pPORTD_FER |= PD0 | PD1 | PD2 | PD3 | PD4 | PD5; /* PPI18..23 */ + P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, + P_PPI0_D23, #endif + P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, 0, + }; + peripheral_request_list(pins, "lcd"); - *pPORTE_FER &= ~PE3; /* DISP */ - *pPORTE_DIR_SET = PE3; - *pPORTE_SET = PE3; - + gpio_request(GPIO_PE3, "lcd-disp"); + gpio_direction_output(GPIO_PE3, 1); } void EnableDMA(void) -- cgit v1.2.1