From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/amcc/makalu/cmd_pll.c | 10 +++++----- board/amcc/makalu/makalu.c | 14 +++++++------- 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'board/amcc/makalu') diff --git a/board/amcc/makalu/cmd_pll.c b/board/amcc/makalu/cmd_pll.c index 0d2f27fe52..0f571fefed 100644 --- a/board/amcc/makalu/cmd_pll.c +++ b/board/amcc/makalu/cmd_pll.c @@ -48,7 +48,7 @@ do { \ int __i; \ for (__i = 0; __i < 2; __i++) \ - eeprom_write (CFG_I2C_EEPROM_ADDR, \ + eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, \ EEPROM_CONF_OFFSET + __i*BUF_STEP, \ pll_select[freq], \ BUF_STEP + __i*BUF_STEP); \ @@ -151,7 +151,7 @@ pll_debug(int off) uchar buffer[EEPROM_SDSTP_PARAM]; memset(buffer, 0, sizeof(buffer)); - eeprom_read(CFG_I2C_EEPROM_ADDR, off, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off, buffer, EEPROM_SDSTP_PARAM); printf("Debug: SDSTP[0-3] at offset \"0x%02x\" lists as follows: \n", off); @@ -168,9 +168,9 @@ test_write(void) /* * Write twice, 8 bytes per write */ - eeprom_write (CFG_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET, + eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET, testbuf, 8); - eeprom_write (CFG_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET+8, + eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET+8, testbuf, 16); printf("done\n"); @@ -236,7 +236,7 @@ ret: } U_BOOT_CMD( - pllalter, CFG_MAXARGS, 1, do_pll_alter, + pllalter, CONFIG_SYS_MAXARGS, 1, do_pll_alter, "pllalter- change pll frequence \n", "pllalter - change pll frequence \n\n\ ** New freq take effect after reset. ** \n\ diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c index fc79907baa..9fc0ec6667 100644 --- a/board/amcc/makalu/makalu.c +++ b/board/amcc/makalu/makalu.c @@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; -extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* * Board early initialization function @@ -194,9 +194,9 @@ int board_early_init_f (void) mtsdr(SDR0_SRST, 0); /* Reset PCIe slots */ - gpio_write_bit(CFG_GPIO_PCIE_RST, 0); + gpio_write_bit(CONFIG_SYS_GPIO_PCIE_RST, 0); udelay(100); - gpio_write_bit(CFG_GPIO_PCIE_RST, 1); + gpio_write_bit(CONFIG_SYS_GPIO_PCIE_RST, 1); /* * Configure PFC (Pin Function Control) registers @@ -213,7 +213,7 @@ int misc_init_r(void) #ifdef CONFIG_ENV_IS_IN_FLASH /* Monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - -CFG_MONITOR_LEN, + -CONFIG_SYS_MONITOR_LEN, 0xffffffff, &flash_info[0]); #endif @@ -286,9 +286,9 @@ void pcie_setup_hoses(int busno) /* setup mem resource */ pci_set_region(hose->regions + 0, - CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE, - CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE, - CFG_PCIE_MEMSIZE, + CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE, + CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE, + CONFIG_SYS_PCIE_MEMSIZE, PCI_REGION_MEM); hose->region_count = 1; pci_register_hose(hose); -- cgit v1.2.1