From 70c5b7b37e34099c428366bdaf266f472dc24377 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Thu, 28 Apr 2016 15:36:05 +0530 Subject: ARM: omap5: add platform specific ethernet phy modes configurations Add platforms specific phy mode configuration bits to be used to configure phy mode in control module. Signed-off-by: Mugunthan V N Reviewed-by: Tom Rini Acked-by: Joe Hershberger --- arch/arm/include/asm/arch-omap5/cpu.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h index b1513e9aaf..683d905333 100644 --- a/arch/arm/include/asm/arch-omap5/cpu.h +++ b/arch/arm/include/asm/arch-omap5/cpu.h @@ -116,4 +116,16 @@ struct watchdog { #define CPSW_BASE 0x48484000 #define CPSW_MDIO_BASE 0x48485000 +/* gmii_sel register defines */ +#define GMII1_SEL_MII 0x0 +#define GMII1_SEL_RMII 0x1 +#define GMII1_SEL_RGMII 0x2 +#define GMII2_SEL_MII (GMII1_SEL_MII << 4) +#define GMII2_SEL_RMII (GMII1_SEL_RMII << 4) +#define GMII2_SEL_RGMII (GMII1_SEL_RGMII << 4) + +#define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII) +#define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII) +#define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII) + #endif /* _CPU_H */ -- cgit v1.2.1