From ff5fb2a36dff8a92d6483359167a6b1525359eaf Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Wed, 13 Aug 2014 18:32:19 +0800 Subject: Fman/mEMAC: mEMAC fix for 10G MAC and PHY 1. use Payload length check disable when enable MAC; 2. add XGMII support for setting MAC interface mode; 3. only enable auto negotiation for Non-XGMII mode; 4. return 0xffff if clause 22 is used to read 10G phy_id; Signed-off-by: Shaohui Xie Signed-off-by: Roy Zang Acked-By: Joe Hershberger Reviewed-by: York Sun --- arch/powerpc/include/asm/fsl_memac.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/powerpc/include/asm/fsl_memac.h b/arch/powerpc/include/asm/fsl_memac.h index 4640e33a5e..f84c1a915b 100644 --- a/arch/powerpc/include/asm/fsl_memac.h +++ b/arch/powerpc/include/asm/fsl_memac.h @@ -159,6 +159,7 @@ struct memac { #define MEMAC_CMD_CFG_RX_EN 0x00000002 /* MAC Rx path enable */ #define MEMAC_CMD_CFG_TX_EN 0x00000001 /* MAC Tx path enable */ #define MEMAC_CMD_CFG_RXTX_EN (MEMAC_CMD_CFG_RX_EN | MEMAC_CMD_CFG_TX_EN) +#define MEMAC_CMD_CFG_NO_LEN_CHK 0x20000 /* Payload length check disable */ /* HASHTABLE_CTRL - Hashtable control register */ #define HASHTABLE_CTRL_MCAST_EN 0x00000200 /* enable mulitcast Rx hash */ -- cgit v1.2.1 From ae6b45830637f7540d0c06280c886bfcb295d27b Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Wed, 13 Aug 2014 18:38:09 +0800 Subject: driver/net/fm/memac_phy: set NEG bit for external MDIOs NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure on XAUI PHY, so set this bit definitely to align with the RM. Signed-off-by: Shaohui Xie Acked-by: Joe Hershberger Reviewed-by: York Sun --- arch/powerpc/include/asm/fsl_memac.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/powerpc/include/asm/fsl_memac.h b/arch/powerpc/include/asm/fsl_memac.h index f84c1a915b..bed2a40bb2 100644 --- a/arch/powerpc/include/asm/fsl_memac.h +++ b/arch/powerpc/include/asm/fsl_memac.h @@ -244,6 +244,7 @@ struct memac_mdio_controller { #define MDIO_STAT_PRE (1 << 5) #define MDIO_STAT_ENC (1 << 6) #define MDIO_STAT_HOLD_15_CLK (7 << 2) +#define MDIO_STAT_NEG (1 << 23) #define MDIO_CTL_DEV_ADDR(x) (x & 0x1f) #define MDIO_CTL_PORT_ADDR(x) ((x & 0x1f) << 5) -- cgit v1.2.1 From a53dd530013bba81ad6ba87a661ff19b12977c23 Mon Sep 17 00:00:00 2001 From: ramneek mehresh Date: Thu, 21 Aug 2014 17:52:17 +0530 Subject: 85xx/b4:Correct USB DR controller liodn entry LIODN entry for B4860/B4420 mentions USB controller as "mph" insread of "dr". This results in PAMU not permitting bus transactions for USB DR controller on B4860 resulting in USB function failure. Replacing "fsl-usb2-mph" with "fsl-usb2-dr" allows USB DR controller bus transactions Signed-off-by: Poonam Aggrwal Signed-off-by: Ramneek Mehresh Reviewed-by: Sethi Varun-B16395 Reviewed-by: Sun Yusong-R58495 --- arch/powerpc/cpu/mpc85xx/b4860_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c index 39b8e3ecc2..1a30f1c405 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c @@ -55,7 +55,7 @@ struct liodn_id_table liodn_tbl[] = { SET_SDHC_LIODN(1, 552), - SET_USB_LIODN(1, "fsl-usb2-mph", 553), + SET_USB_LIODN(1, "fsl-usb2-dr", 553), SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148), -- cgit v1.2.1 From aa5a3d8d4622fc5f0115aa7c4ac752ae60458a44 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 23 Sep 2014 10:57:12 +0530 Subject: powerpc/mpc85xx: Use IFC accessor function IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So use IFC acessor functions instead of in_be32(). Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 6 +++--- arch/powerpc/cpu/mpc85xx/speed.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 072387a87e..5ca9bf5ff9 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -70,9 +70,9 @@ void setup_ifc(void) #endif /* Change flash's physical address */ - out_be32(&(ifc_regs->cspr_cs[0].cspr), CONFIG_SYS_CSPR0); - out_be32(&(ifc_regs->csor_cs[0].csor), CONFIG_SYS_CSOR0); - out_be32(&(ifc_regs->amask_cs[0].amask), CONFIG_SYS_AMASK0); + ifc_out32(&(ifc_regs->cspr_cs[0].cspr), CONFIG_SYS_CSPR0); + ifc_out32(&(ifc_regs->csor_cs[0].csor), CONFIG_SYS_CSOR0); + ifc_out32(&(ifc_regs->amask_cs[0].amask), CONFIG_SYS_AMASK0); return ; } diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 3236f6a5da..8426b1a5c2 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -430,7 +430,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = in_be32(&ifc_regs->ifc_ccr); + ccr = ifc_in32(&ifc_regs->ifc_ccr); ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; sys_info->freq_localbus = sys_info->freq_systembus / ccr; -- cgit v1.2.1 From e83a7e9453295753e84ab51221d167e87cac67aa Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Fri, 3 Oct 2014 11:45:23 +0200 Subject: powerpc/mpc83xx: Zero boot_flags arg for calling board_init_f() The argument boot_flags of board_init_f() is not used at all in the powerpc specific board.c init sequence. Now with the generic init sequence, this boot_flags arg is used by board_init_f(). This patch sets the r3 register that is used to pass the boot_flags argument from the start.S board_init_f() call to 0 prior to the function call to avoid unknown content to end up in gd->flags. Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- arch/powerpc/cpu/mpc83xx/start.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index af75c63eb3..9bd86d82d6 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -283,6 +283,7 @@ in_flash: bl cpu_init_f /* run 1st part of board init code (in Flash)*/ + li r3, 0 /* clear boot_flag for calling board_init_f */ bl board_init_f /* NOTREACHED - board_init_f() does not return */ -- cgit v1.2.1