From 8ba25eec868aa40a42360397ec57f74fcaec3103 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 15 Jul 2015 16:23:38 +0800 Subject: x86: Change pci option rom area MTRR setting to cacheable Turn on cache on the pci option rom area to improve the performance. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/include/asm/mtrr.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/x86/include') diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 70762eed10..f9b30f68bd 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -55,6 +55,8 @@ #define MTRR_FIX_4K_F0000_MSR 0x26e #define MTRR_FIX_4K_F8000_MSR 0x26f +#define MTRR_FIX_TYPE(t) ((t << 24) | (t << 16) | (t << 8) | t) + #if !defined(__ASSEMBLER__) /** -- cgit v1.2.1