From 3e45de6ed416759f0f2699d5bb358183dbdb2063 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 18 Oct 2015 15:55:37 -0600 Subject: x86: ivybridge: Enable the MRC cache This works correctly now, so enable it. Signed-off-by: Bin Meng Dropped malloc() and adjusted commit message: Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/ivybridge/sdram.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'arch/x86/cpu/ivybridge') diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index d9b3dfc12c..4372a5caf2 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -158,14 +158,8 @@ static int prepare_mrc_cache(struct pei_data *pei_data) if (!mrc_cache) return -ENOENT; - /* - * TODO(sjg@chromium.org): Skip this for now as it causes boot - * problems - */ - if (0) { - pei_data->mrc_input = mrc_cache->data; - pei_data->mrc_input_len = mrc_cache->data_size; - } + pei_data->mrc_input = mrc_cache->data; + pei_data->mrc_input_len = mrc_cache->data_size; debug("%s: at %p, size %x checksum %04x\n", __func__, pei_data->mrc_input, pei_data->mrc_input_len, mrc_cache->checksum); -- cgit v1.2.1