From 404bf4547ecb4c1409ae0936444fe02ba978e510 Mon Sep 17 00:00:00 2001 From: Alex Porosanu Date: Fri, 29 Apr 2016 15:17:59 +0300 Subject: arch/arm, arch/powerpc: add # of SEC engines on the SOC Some SOCs, specifically the ones in the C29x familiy can have multiple security engines. This patch adds a system configuration define which indicates the maximum number of SEC engines that can be found on a SoC. Signed-off-by: Alex Porosanu Reviewed-by: York Sun --- arch/powerpc/include/asm/config_mpc85xx.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index eccc146dae..505d355bc8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -928,6 +928,8 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3 +#define CONFIG_SYS_FSL_SEC_IDX_OFFSET 0x20000 #elif defined(CONFIG_QEMU_E500) #define CONFIG_MAX_CPUS 1 @@ -954,4 +956,8 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_DDRC_GEN3 #endif +#if !defined(CONFIG_PPC_C29X) +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 +#endif + #endif /* _ASM_MPC85xx_CONFIG_H_ */ -- cgit v1.2.1 From 76394c9c9139b82e21a6e52da0e7341a3374f4be Mon Sep 17 00:00:00 2001 From: Alex Porosanu Date: Fri, 29 Apr 2016 15:18:00 +0300 Subject: crypto/fsl: add support for multiple SEC engines initialization For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index f168375b45..61f5639e0d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -958,6 +958,15 @@ int cpu_init_r(void) #ifdef CONFIG_FSL_CAAM sec_init(); + +#if defined(CONFIG_PPC_C29X) + if ((SVR_SOC_VER(svr) == SVR_C292) || + (SVR_SOC_VER(svr) == SVR_C293)) + sec_init_idx(1); + + if (SVR_SOC_VER(svr) == SVR_C293) + sec_init_idx(2); +#endif #endif #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) -- cgit v1.2.1