From a8c686399f01c359713447c2adaecf94f3a4445b Mon Sep 17 00:00:00 2001
From: Aneesh V <aneesh@ti.com>
Date: Mon, 21 Nov 2011 23:34:00 +0000
Subject: armv7: setup vector

The vector is not correctly setup in armv7 except for OMAP3.
Correcting this.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/cpu/armv7/start.S | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

(limited to 'arch/arm')

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index db8e9d2f18..f17763f2a1 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -32,6 +32,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
+#include <asm/system.h>
 
 .globl _start
 _start: b	reset
@@ -143,6 +144,22 @@ reset:
 	orr	r0, r0, #0xd3
 	msr	cpsr,r0
 
+/*
+ * Setup vector:
+ * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
+ * Continue to use ROM code vector only in OMAP4 spl)
+ */
+#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
+	/* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
+	mrc	p15, 0, r0, c1, c0, 0	@ Read CP15 SCTRL Register
+	bic	r0, #CR_V		@ V = 0
+	mcr	p15, 0, r0, c1, c0, 0	@ Write CP15 SCTRL Register
+
+	/* Set vector address in CP15 VBAR register */
+	ldr	r0, =_start
+	mcr	p15, 0, r0, c12, c0, 0	@Set VBAR
+#endif
+
 #if defined(CONFIG_OMAP34XX)
 	/* Copy vectors to mask ROM indirect addr */
 	adr	r0, _start		@ r0 <- current position of code
-- 
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