From 8b06460e5518eeec449298c91fb1424b36c9b305 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@freescale.com>
Date: Fri, 20 Mar 2015 19:28:31 -0700
Subject: ls2085a: esdhc: Add esdhc support for ls2085a

This patch adds esdhc support for ls2085a.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
---
 arch/arm/cpu/armv8/fsl-lsch3/cpu.c           | 10 ++++++++++
 arch/arm/cpu/armv8/fsl-lsch3/fdt.c           |  7 +++++++
 arch/arm/include/asm/arch-fsl-lsch3/config.h |  2 ++
 3 files changed, 19 insertions(+)

(limited to 'arch/arm')

diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 07064a32b9..67145778b9 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -13,6 +13,9 @@
 #include <fsl_debug_server.h>
 #include <fsl-mc/fsl_mc.h>
 #include <asm/arch/fsl_serdes.h>
+#ifdef CONFIG_FSL_ESDHC
+#include <fsl_esdhc.h>
+#endif
 #include "cpu.h"
 #include "mp.h"
 #include "speed.h"
@@ -412,6 +415,13 @@ int print_cpuinfo(void)
 }
 #endif
 
+#ifdef CONFIG_FSL_ESDHC
+int cpu_mmc_init(bd_t *bis)
+{
+	return fsl_esdhc_mmc_init(bis);
+}
+#endif
+
 int cpu_eth_init(bd_t *bis)
 {
 	int error = 0;
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
index 42c5b58d9a..d37002333c 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
@@ -7,6 +7,9 @@
 #include <common.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#ifdef CONFIG_FSL_ESDHC
+#include <fsl_esdhc.h>
+#endif
 #include "mp.h"
 
 #ifdef CONFIG_MP
@@ -65,4 +68,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_compat_u32(blob, "fsl,ns16550",
 			       "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 #endif
+
+#if defined(CONFIG_FSL_ESDHC)
+	fdt_fixup_esdhc(blob, bd);
+#endif
 }
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 77c20ab4ad..ca8d38cf78 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -31,6 +31,7 @@
 #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR	(CONFIG_SYS_IMMR + 0x00300000)
 #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR	(CONFIG_SYS_IMMR + 0x00310000)
 #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR	(CONFIG_SYS_IMMR + 0x00370000)
+#define CONFIG_SYS_FSL_ESDHC_ADDR		(CONFIG_SYS_IMMR + 0x01140000)
 #define CONFIG_SYS_IFC_ADDR			(CONFIG_SYS_IMMR + 0x01240000)
 #define CONFIG_SYS_NS16550_COM1			(CONFIG_SYS_IMMR + 0x011C0500)
 #define CONFIG_SYS_NS16550_COM2			(CONFIG_SYS_IMMR + 0x011C0600)
@@ -110,6 +111,7 @@
 #define CONFIG_MAX_MEM_MAPPED		CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
 #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_5_0
 
+#define CONFIG_SYS_FSL_ESDHC_LE
 /* IFC */
 #define CONFIG_SYS_FSL_IFC_LE
 #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-- 
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