From 9eb7acef97d1a892d59c5928001dd9516bb592de Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:43 +0900 Subject: ARM: UniPhier: move SoC headers to mach-uniphier/include/mach Move arch/arm/include/asm/arch-uniphier/* -> arch/arm/mach-uniphier/include/mach/* Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/bcu-regs.h | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 arch/arm/mach-uniphier/include/mach/bcu-regs.h (limited to 'arch/arm/mach-uniphier/include/mach/bcu-regs.h') diff --git a/arch/arm/mach-uniphier/include/mach/bcu-regs.h b/arch/arm/mach-uniphier/include/mach/bcu-regs.h new file mode 100644 index 0000000000..0dfd94e5d7 --- /dev/null +++ b/arch/arm/mach-uniphier/include/mach/bcu-regs.h @@ -0,0 +1,30 @@ +/* + * UniPhier BCU (Bus Control Unit) registers + * + * Copyright (C) 2011-2014 Panasonic Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef ARCH_BCU_REGS_H +#define ARCH_BCU_REGS_H + +#define BCU_BASE 0x50080000 + +#define BCSCR(x) (BCU_BASE + 0x180 + (x) * 4) +#define BCSCR0 (BCSCR(0)) +#define BCSCR1 (BCSCR(1)) +#define BCSCR2 (BCSCR(2)) +#define BCSCR3 (BCSCR(3)) +#define BCSCR4 (BCSCR(4)) +#define BCSCR5 (BCSCR(5)) + +#define BCIPPCCHR(x) (BCU_BASE + 0x0280 + (x) * 4) +#define BCIPPCCHR0 (BCIPPCCHR(0)) +#define BCIPPCCHR1 (BCIPPCCHR(1)) +#define BCIPPCCHR2 (BCIPPCCHR(2)) +#define BCIPPCCHR3 (BCIPPCCHR(3)) +#define BCIPPCCHR4 (BCIPPCCHR(4)) +#define BCIPPCCHR5 (BCIPPCCHR(5)) + +#endif /* ARCH_BCU_REGS_H */ -- cgit v1.2.1