From 4021b4381d8d3c18a3d8732967eec3ec1624ab7b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 26 Feb 2016 14:21:40 +0900 Subject: ARM: uniphier: add a field to specify DDR3+ Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/boards.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-uniphier/boards.c') diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index 05b7c7612e..408aff0cd0 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -38,6 +38,7 @@ static const struct uniphier_board_data ph1_sld3_data = { static const struct uniphier_board_data ph1_ld4_data = { .dram_freq = 1600, .dram_nr_ch = 2, + .dram_ddr3plus = true, .dram_ch[0] = { .base = 0x80000000, .size = 0x10000000, @@ -89,6 +90,7 @@ static const struct uniphier_board_data ph1_pro4_2g_data = { static const struct uniphier_board_data ph1_sld8_data = { .dram_freq = 1333, .dram_nr_ch = 2, + .dram_ddr3plus = true, .dram_ch[0] = { .base = 0x80000000, .size = 0x10000000, -- cgit v1.2.1