From 2bc00e016e4c1440f3004776e26357f46eb6690a Mon Sep 17 00:00:00 2001
From: huang lin <hl@rock-chips.com>
Date: Tue, 17 Nov 2015 14:20:18 +0800
Subject: rockchip: rk3036: Add Soc reset driver

We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
 arch/arm/mach-rockchip/rk3036/Makefile | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/rk3036/Makefile

(limited to 'arch/arm/mach-rockchip/rk3036/Makefile')

diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
new file mode 100644
index 0000000000..a483347335
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2015 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+ifndef CONFIG_SPL_BUILD
+obj-y += reset_rk3036.o
+endif
+
-- 
cgit v1.2.1