From 14a66afead568a5c3a6bb49782432bea3b397fb8 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Mon, 3 Aug 2015 17:58:01 +0530 Subject: ARM: exynos: fix regression for Origen4210 The do_lowlevel_init() function includes certian CA15 specific L2 cache configuration which is only applicable on Exynos5420 and members of its family. Fix the regression on Origen4210 by skipping the Exynos5420 specific portions of the code. Cc: Minkyu Kang Cc: Albert Aribaud Signed-off-by: Thomas Abraham Tested-by: Przemyslaw Marczak Acked-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- arch/arm/mach-exynos/common_setup.h | 2 +- arch/arm/mach-exynos/lowlevel_init.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-exynos') diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h index 5235abb808..67aac2d575 100644 --- a/arch/arm/mach-exynos/common_setup.h +++ b/arch/arm/mach-exynos/common_setup.h @@ -60,7 +60,7 @@ enum l2_cache_params { }; -#ifndef CONFIG_SYS_L2CACHE_OFF +#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420) /* * Configure L2CTLR to get timings that keep us from hanging/crashing. * diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 3774607848..6c39cb2052 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -175,7 +175,7 @@ int do_lowlevel_init(void) arch_cpu_init(); -#ifndef CONFIG_SYS_L2CACHE_OFF +#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420) /* * Init L2 cache parameters here for use by boot and resume * @@ -188,9 +188,7 @@ int do_lowlevel_init(void) configure_l2_actlr(); dsb(); isb(); -#endif -#ifdef CONFIG_EXYNOS5420 relocate_wait_code(); /* Reconfigure secondary cores */ -- cgit v1.2.1