From 96a2859e54c8f6153ddb429ba730b324ab8ff352 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Fri, 29 Nov 2013 19:01:25 +0530 Subject: ARM: zynq: Added efuse status register base address Added efuse status register base address. This register is used for determining whether efuse was blown or not. Also, added the zynq_get_silicon_version() to get the silicon version of the zynq board. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynq/hardware.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/include/asm/arch-zynq/hardware.h') diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h index 39184da40e..20f62bfc75 100644 --- a/arch/arm/include/asm/arch-zynq/hardware.h +++ b/arch/arm/include/asm/arch-zynq/hardware.h @@ -22,6 +22,7 @@ #define ZYNQ_SPI_BASEADDR0 0xE0006000 #define ZYNQ_SPI_BASEADDR1 0xE0007000 #define ZYNQ_DDRC_BASEADDR 0xF8006000 +#define ZYNQ_EFUSE_BASEADDR 0xF800D000 /* Bootmode setting values */ #define ZYNQ_BM_MASK 0xF @@ -130,4 +131,12 @@ struct ddrc_regs { }; #define ddrc_base ((struct ddrc_regs *)ZYNQ_DDRC_BASEADDR) +struct efuse_reg { + u32 reserved1[4]; + u32 status; + u32 reserved2[3]; +}; + +#define efuse_base ((struct efuse_reg *)ZYNQ_EFUSE_BASEADDR) + #endif /* _ASM_ARCH_HARDWARE_H */ -- cgit v1.2.1