From 96e82a253a4c3a122de5023d9ca5fe04d9e19502 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 14 Apr 2015 21:03:34 -0600 Subject: tegra124: clock: Add display clocks and functions Add functions to provide access to the display clocks on Tegra124 including setting the clock rate for an EDP display. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra124/clock.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/arm/include/asm/arch-tegra124/clock.h') diff --git a/arch/arm/include/asm/arch-tegra124/clock.h b/arch/arm/include/asm/arch-tegra124/clock.h index 8e65086252..e202cc5a7f 100644 --- a/arch/arm/include/asm/arch-tegra124/clock.h +++ b/arch/arm/include/asm/arch-tegra124/clock.h @@ -16,6 +16,27 @@ #define OSC_FREQ_SHIFT 28 #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) +/* CLK_RST_CONTROLLER_CLK_SOURCE_SOR0_0 */ +#define SOR0_CLK_SEL0 (1 << 14) +#define SOR0_CLK_SEL1 (1 << 15) + int tegra_plle_enable(void); +void clock_sor_enable_edp_clock(void); + +/** + * clock_set_display_rate() - Set the display clock rate + * + * @frequency: the requested PLLD frequency + * + * Return the PLLD frequenc (which may not quite what was requested), or 0 + * on failure + */ +u32 clock_set_display_rate(u32 frequency); + +/** + * clock_set_up_plldp() - Set up the EDP clock ready for use + */ +void clock_set_up_plldp(void); + #endif /* _TEGRA124_CLOCK_H_ */ -- cgit v1.2.1