From 323846561a7253433818d0e04630cb83433fa0f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Thu, 27 Sep 2012 10:24:37 +0000 Subject: mx5/6 clocks: Fix SDHC clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Eric Bénard Cc: Otavio Salvador --- arch/arm/include/asm/arch-mx5/clock.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/include/asm/arch-mx5') diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 83fb877638..9cdfb48a7a 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -45,6 +45,10 @@ enum mxc_clock { MXC_IPG_PERCLK, MXC_UART_CLK, MXC_CSPI_CLK, + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC3_CLK, + MXC_ESDHC4_CLK, MXC_FEC_CLK, MXC_SATA_CLK, MXC_DDR_CLK, -- cgit v1.2.1