From 0b868589563ab96384b9a817bc5b82d93c573ea5 Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Wed, 9 Jul 2014 19:48:40 +0300 Subject: keystone: ddr3: add ddr3.h to hold ddr3 API It's convinient to hold ddr3 function definitions in separate file such as ddr3.h. So move this from hardware.h to ddr3.h. Acked-by: Murali Karicheri Signed-off-by: Ivan Khoronzhuk --- arch/arm/include/asm/arch-keystone/ddr3.h | 55 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-keystone/hardware.h | 39 ------------------- 2 files changed, 55 insertions(+), 39 deletions(-) create mode 100644 arch/arm/include/asm/arch-keystone/ddr3.h (limited to 'arch/arm/include/asm/arch-keystone') diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h b/arch/arm/include/asm/arch-keystone/ddr3.h new file mode 100644 index 0000000000..05b7e2920d --- /dev/null +++ b/arch/arm/include/asm/arch-keystone/ddr3.h @@ -0,0 +1,55 @@ +/* + * DDR3 + * + * (C) Copyright 2014 + * Texas Instruments Incorporated, + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DDR3_H_ +#define _DDR3_H_ + +#include + +struct ddr3_phy_config { + unsigned int pllcr; + unsigned int pgcr1_mask; + unsigned int pgcr1_val; + unsigned int ptr0; + unsigned int ptr1; + unsigned int ptr2; + unsigned int ptr3; + unsigned int ptr4; + unsigned int dcr_mask; + unsigned int dcr_val; + unsigned int dtpr0; + unsigned int dtpr1; + unsigned int dtpr2; + unsigned int mr0; + unsigned int mr1; + unsigned int mr2; + unsigned int dtcr; + unsigned int pgcr2; + unsigned int zq0cr1; + unsigned int zq1cr1; + unsigned int zq2cr1; + unsigned int pir_v1; + unsigned int pir_v2; +}; + +struct ddr3_emif_config { + unsigned int sdcfg; + unsigned int sdtim1; + unsigned int sdtim2; + unsigned int sdtim3; + unsigned int sdtim4; + unsigned int zqcfg; + unsigned int sdrfc; +}; + +void ddr3_init(void); +void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg); +void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg); + +#endif diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h index 4e49143ec6..f8f986ca60 100644 --- a/arch/arm/include/asm/arch-keystone/hardware.h +++ b/arch/arm/include/asm/arch-keystone/hardware.h @@ -22,42 +22,6 @@ typedef volatile unsigned int dv_reg; typedef volatile unsigned int *dv_reg_p; -struct ddr3_phy_config { - unsigned int pllcr; - unsigned int pgcr1_mask; - unsigned int pgcr1_val; - unsigned int ptr0; - unsigned int ptr1; - unsigned int ptr2; - unsigned int ptr3; - unsigned int ptr4; - unsigned int dcr_mask; - unsigned int dcr_val; - unsigned int dtpr0; - unsigned int dtpr1; - unsigned int dtpr2; - unsigned int mr0; - unsigned int mr1; - unsigned int mr2; - unsigned int dtcr; - unsigned int pgcr2; - unsigned int zq0cr1; - unsigned int zq1cr1; - unsigned int zq2cr1; - unsigned int pir_v1; - unsigned int pir_v2; -}; - -struct ddr3_emif_config { - unsigned int sdcfg; - unsigned int sdtim1; - unsigned int sdtim2; - unsigned int sdtim3; - unsigned int sdtim4; - unsigned int zqcfg; - unsigned int sdrfc; -}; - #endif #define BIT(x) (1 << (x)) @@ -149,9 +113,6 @@ static inline int cpu_revision(void) void share_all_segments(int priv_id); int cpu_to_bus(u32 *ptr, u32 length); -void init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg); -void init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg); -void init_ddr3(void); void sdelay(unsigned long); #endif -- cgit v1.2.1