From 23f00caf6ebb9bcb804e48f5a4630629f64af471 Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Tue, 17 Dec 2013 05:03:40 +0400 Subject: ARM: pxa: prevent PXA270 occasional reboot freezes Erratum 71 of PXA270M Processor Family Specification Update (April 19, 2010) explains that watchdog reset time is just 8us insead of 10ms in EMTS. If SDRAM is not reset, it causes memory bus congestion and the device hangs. We put SDRAM in selfresh mode before watchdog reset, removing potential freezes. Signed-off-by: Sergei Ianovich CC: Marek Vasut --- arch/arm/cpu/pxa/pxa2xx.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/cpu/pxa/pxa2xx.c') diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index c9a7d45392..7e861e26db 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -279,6 +279,7 @@ void reset_cpu(ulong ignored) tmp = readl(OSCR); tmp += 0x1000; writel(tmp, OSMR3); + writel(MDREFR_SLFRSH, MDREFR); for (;;) ; -- cgit v1.2.1