From 155d424a9a0228e2f38ce21a92b20c31896d61d2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 28 Aug 2013 09:00:28 -0400 Subject: am33xx, davinci: Create and use Create a common header file for the RTC IP block that is shared between davinci and am33xx. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/cpu/armv7/am33xx/board.c') diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index a31bf40e5b..453effa541 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -32,6 +32,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -150,15 +151,15 @@ __weak void am33xx_spl_board_init(void) static void rtc32k_enable(void) { - struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; /* * Unlock the RTC's registers. For more details please see the * RTC_SS section of the TRM. In order to unlock we need to * write these specific values (keys) in this order. */ - writel(0x83e70b13, &rtc->kick0r); - writel(0x95a4f1e0, &rtc->kick1r); + writel(RTC_KICK0R_WE, &rtc->kick0r); + writel(RTC_KICK1R_WE, &rtc->kick1r); /* Enable the RTC 32K OSC by setting bits 3 and 6. */ writel((1 << 3) | (1 << 6), &rtc->osc); -- cgit v1.2.1