From f6e27ba5b40a8861336f4e27a7b95cf60b0c8961 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Sun, 4 Oct 2015 16:10:26 +0300 Subject: board: axs10x - cap max SDIO clock value to bus/2 It turned out with some boards (FPGA firmwares?) and cards combos current clock settings doesn't work as expected leading to strange card freezes or corrupted data being read from the card. Especially this was seen with Transcend 2Gb cards shipped as a part of ARC SDP: ----------------->8--------------- AXS# mmcinfo Device: Synopsys Mobile storage Manufacturer ID: 74 OEM: 4a60 Name: SDC Tran Speed: 50000000 Rd Block Len: 512 SD version 3.0 High Capacity: No Capacity: 1.8 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes AXS# fatload mmc 0 ** Unrecognized filesystem type ** ----------------->8--------------- With this change that problem is fixed. Note "Tran Speed" above doesn't match clock value set in DW MMC. It is max value for card's speed class. Signed-off-by: Alexey Brodkin --- board/synopsys/axs101/axs101.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c index d4280f743a..aa446b916e 100644 --- a/board/synopsys/axs101/axs101.c +++ b/board/synopsys/axs101/axs101.c @@ -30,7 +30,7 @@ int board_mmc_init(bd_t *bis) host->dev_index = 0; host->bus_hz = 50000000; - add_dwmci(host, host->bus_hz, 400000); + add_dwmci(host, host->bus_hz / 2, 400000); return 0; } -- cgit v1.2.1