From 6e04769caf208a9f2da8ef8a85353def2a170176 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 27 Mar 2014 10:06:43 +0100 Subject: ARM: zynq: slcr: Fix incorrect commentary Fix c&p error in zynq_slcr_devcfg_enable() commentary and extending it with description according to Zynq TRM also in zynq_slcr_devcfg_disable(). Signed-off-by: Michal Simek --- arch/arm/cpu/armv7/zynq/slcr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index c326a4c5de..1ff1eac06f 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -83,7 +83,7 @@ void zynq_slcr_devcfg_disable(void) { zynq_slcr_unlock(); - /* Disable AXI interface */ + /* Disable AXI interface by asserting FPGA resets */ writel(0xFFFFFFFF, &slcr_base->fpga_rst_ctrl); /* Set Level Shifters DT618760 */ @@ -99,7 +99,7 @@ void zynq_slcr_devcfg_enable(void) /* Set Level Shifters DT618760 */ writel(0xF, &slcr_base->lvl_shftr_en); - /* Disable AXI interface */ + /* Enable AXI interface by de-asserting FPGA resets */ writel(0x0, &slcr_base->fpga_rst_ctrl); zynq_slcr_lock(); -- cgit v1.2.1