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* dm: x86: Add a northbridge uclassSimon Glass2016-01-241-0/+1
| | | | | | | | Add a uclass for the northbridge / SDRAM controller found on some older Intel chipsets. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Convert bios_emu to use the driver model PCI APISimon Glass2016-01-241-1/+18
| | | | | | | | At present this BIOS emulator uses a bus/device/function number. Change it to use a device if CONFIG_DM_PCI is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: syscon: Allow finding devices by driver dataSimon Glass2016-01-241-0/+14
| | | | | | | | We have a way to find a regmap by its syscon driver data value. Add the same for syscon itself. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop the irq router compatible stringSimon Glass2016-01-241-1/+0
| | | | | | | We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: Set up interrupt routing from interrupt_init()Simon Glass2016-01-241-1/+0
| | | | | | | | | | | | | | | At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init(). This removes the manual pirq_init() call. Where the platform does not have an interrupt router defined in its device tree, no error is generated. Some platforms do not have this. Drop pirq_init() since it is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: Create a driver for x86 interruptsSimon Glass2016-01-241-0/+1
| | | | | | | | | | | | | | | | It seems likely that at some point we will want a generic interrupt uclass. But this is a big undertaking as it involves unifying code across multiple architectures. As a first step, create a simple IRQ uclass and a driver for x86. This can be generalised later as required. Adjust pirq_init() to probe this driver, which has the effect of creating routing tables and setting up the interrupt routing. This is a start towards making interrupts fit better with driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: Add a driver for Intel PCH7Simon Glass2016-01-241-0/+4
| | | | | | | | | At some point we may need to distinguish between different types of PCHs, but for existing supported platforms we only need to worry about version 7 and version 9 bridges. Add a driver for the PCH7. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: Expand the uclass for Platform Controller Hubs (PCH)Simon Glass2016-01-241-0/+74
| | | | | | | | | | | | | | A Platform Controller Hub is an Intel concept - it is like the peripherals on an SoC and is often in a separate chip from the CPU. The chip is typically found on the first PCI bus and integrates multiple devices. We have a very simple uclass to support PCHs. Add a few operations, such as setting up the devices on the PCH and finding the SPI controller base address. Also move it into drivers/pch/ since we will be adding a few PCH drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a function to write a BARSimon Glass2016-01-241-2/+15
| | | | | | | | Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* rockchip: Add support for Raxda Rock 2Simon Glass2016-01-211-0/+31
| | | | | | | | | | | | This board includes an RK3288 SoC on a SOM. It can be mounted on a base-board which provides a wide range of peripherals. So far this is verified to boot to a prompt from a microSD card. The serial console works as well as HDMI. Thanks to Tom Cubie for sending me a board. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: firefly-rk3288: Enable HDMI outputSimon Glass2016-01-211-1/+8
| | | | | | Enable HDMI output and a console on firefly. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Enable EDP and HDMI video outputSimon Glass2016-01-211-2/+6
| | | | | | | | | | | Enable these devices using the VOPL video output device. We explicitly disable VOPB in the device tree to avoid it taking over. Since this device has an LCD display this comes up by default. If the display fails for some reason then it will attempt to use HDMI. It is possible to force it to fail (and thus fall back to HDMI) by puting 'return -EPERM' at the top of rk_edp_probe(). For now there is no easy way to select between the two. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Add support for timing SPI flash speedSimon Glass2016-01-211-0/+3
| | | | | | | Add the 'time' and 'sf test' commands so that we can test SPI flash performance. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spl: Support full-speed CPU in SPLSimon Glass2016-01-211-0/+3
| | | | | | | | Add a feature which speeds up the CPU to full speed in SPL to minimise boot time. This is only supported for certain boards (at present only jerry). Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: config: Enable the 'gpio' commandSimon Glass2016-01-211-0/+1
| | | | | | | Now that we have a pretty good GPIO driver, enable the 'gpio' command on all rockchip boards. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Don't skip low-level initSimon Glass2016-01-211-1/+0
| | | | | | | At present the low-level init is skipped on rockchip. Among other things this means that the instruction cache is left disabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: video: Repurpose the 'displayport' uclass to 'display'Simon Glass2016-01-213-13/+23
| | | | | | | | | | | | | | The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and LVDS LCD displays. Generalise the uclass so that it can be used with these devices as well. Adjust the uclass to handle the EDID reading and conversion to display_timing internally. Also update nyan-big which is affected by this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: panel: Add a panel uclassSimon Glass2016-01-212-0/+32
| | | | | | | | LCD panels can usefully be modelled as their own uclass. They can be probed (which powers them up ready for use). If they have a backlight, this can be enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: backlight: Add a backlight uclassSimon Glass2016-01-212-0/+32
| | | | | | | | LCD panels normally have a backlight which can be controlled to illuminate the LCD contents. Add a uclass to support this. Initially it only has a method to enable the backlight. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pwm: Add a PWM uclassSimon Glass2016-01-212-0/+54
| | | | | | | Add a uclass that supports Pulse Width Modulation (PWM) devices. It provides methods to enable/disable and configure the device. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Add a function to control cache flushingSimon Glass2016-01-211-0/+8
| | | | | | Allow the cache-flushing function of a video device to be controlled. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Name consoles by their numberSimon Glass2016-01-211-4/+4
| | | | | | | | | | | | We must use the console name in the 'stdout' variable to select the one we want. At present the name is formed from the driver name with a suffix indicating the rotation value. It seems better to name them sequentially since this can be controlled by driver order. So adjust the code to use 'vidconsole' for the first, 'vidconsole1' for the second, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Enable the Chrome OS ECSimon Glass2016-01-213-0/+16
| | | | | | Turn on the EC and enable the keyboard. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Export uclass_find_device_by_of_offset()Simon Glass2016-01-211-0/+16
| | | | | | | | It is sometimes useful to be able to find a device before probing it, perhaps to set up some platform data for it. Allow finding by of_offset also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pinctrl: Add a way for a GPIO driver to obtain a pin functionSimon Glass2016-01-211-0/+32
| | | | | | | | | | | | | GPIO drivers want to be able to show if a pin is enabled for input, output, or is being used by another function. Some drivers can easily find this and the code is included in the driver. For some SoCs this is more complex. Conceptually this should be handled by pinctrl rather than GPIO. Most pinctrl drivers will have this feature anyway. Add a method by which a GPIO driver can obtain the pin mux value given a GPIO reference. This avoids repeating the code in two places. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Drop unused optionsSimon Glass2016-01-211-0/+2
| | | | | | | To reduce the SPL image size, drop the LED features. Jerry does not have an LED and we can leave out GPIO support also. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Use pwrseq for MMC start-up on jerrySimon Glass2016-01-211-0/+1
| | | | | | | This is defined in the device tree in Linux. Copy over the settings so that this can be used instead of hard-coding the reset line. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a power sequencing uclassSimon Glass2016-01-212-0/+19
| | | | | | | | Some devices need special sequences to be used when starting up. Add a uclass for this. Drivers can be added to provide specific features as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: Add base support for the RK808 PMICSimon Glass2016-01-211-0/+77
| | | | | | | | | | This Rockchip PMIC provides features suitable for battery-powered applications. It is commonly used with Rockchip SoCs. Add a driver which provides register access. The regulator driver will use this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pinctrl: Add a function to parse PIN_CONFIG flagsSimon Glass2016-01-211-0/+13
| | | | | | | | Add a function which produces a flags word from a few common PIN_CONFIG settings. This is useful for simple pinctrl drivers that don't need to worry about drive strength, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: kylin: Store env in emmcJeffy Chen2016-01-211-0/+12
| | | | | | | | There's a 64K reserved area at the end of the first 4M. Store env there, so we can use fastboot to flash it. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: kylin: Check fastboot requestJeffy Chen2016-01-211-0/+3
| | | | | | | | | We will save boot mode flag in grf's os_reg[4], if fastboot requested or fastboot key pressed, try to enter fastboot mode at preboot stage. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: kylin: Add default gpt partition tableJeffy Chen2016-01-211-0/+29
| | | | | | | | | | Add default android gpt partition table for kylin board. Use "gpt write mmc 0 $partitions" to apply. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* dm: clk: Add support for decoding clocks from the device treeSimon Glass2016-01-211-0/+24
| | | | | | | | | Add a method which can locate a clock for a device, given its index. This uses the normal device tree bindings to return the clock device and the first argument which is normally used as a peripheral ID in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-2119-33/+375
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| * dm: video: test: Test that bitmap display works correctlySimon Glass2016-01-201-0/+2
| | | | | | | | | | | | | | | | Add a test for the 'bmp' command. Test both the uncompressed and compressed versions of the file, since they use different code paths. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: test: Add tests for the video uclassSimon Glass2016-01-201-0/+8
| | | | | | | | | | | | | | | | | | Add tests that check that the video console is working correcty. Also check that text output produces the expected result. Test coverage includes character output, wrapping and scrolling. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: sandbox: Convert sandbox to use driver model for videoSimon Glass2016-01-202-7/+4
| | | | | | | | | | | | | | | | Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * sandbox: Move CONFIG_VIDEO_SANDBOX_SDL to KconfigSimon Glass2016-01-201-1/+0
| | | | | | | | | | | | | | | | Move this option to Kconfig. This is quite simple as only sandbox uses the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: common: Add memory reservation for the video uclassSimon Glass2016-01-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Before relocation we need to reserve memory for the video driver frame buffers so that they can use this memory when they start up (after relocation). Add a call to the uclass to permit this. The current top and bottom of the region is stored in global_data so that it can be checked post-relocation to ensure enough memory is available. No video device should be probed before relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a uclass for the text consoleSimon Glass2016-01-202-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | The existing LCD/video interface suffers from conflating the bitmap display with text output on that display. As a result the implementation is more complex than it needs to me. We can support multiple text console drivers. Create a separate uclass to support this, with its own API. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: lcd: Avoid using the lcd.h header file with driver modelSimon Glass2016-01-201-4/+8
| | | | | | | | | | | | | | | | | | The LCD functions and definitions are not used with the driver model video uclass. When all boards are converted over we can remove the file. For now, use #ifdef to omit the contents. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a video uclassSimon Glass2016-01-202-6/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has separate code for LCDs and 'video' devices. Both now use a very similar API thanks to earlier work by Nikita Kiryanov. With the driver- model conversion we should unify these into a single uclass. Unfortunately there are different features supported by each. This implementation provides for a common set of features which should serve most purposes. The intent is to support: - bitmap devices with 8, 16 and 32 bits per pixel - text console wih white on black or vice versa - rotated text console - bitmap display (BMP format) More can be added as additional boards are ported over to use driver model for video. The name 'video' is chosen for the uclass since it is more generic than LCD. Another option would be 'display' but that would introduce a third concept to U-Boot which seems like the wrong approach. The existing LCD and video init functions are not needed now, so this uclass makes no attempt to implement them. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * serial: lpuart: Move CONFIG_FSL_LPUART to KconfigBin Meng2016-01-205-5/+0
| | | | | | | | | | | | | | | | | | | | | | LPUART is seen on Freescale VF610 and QorIQ Layerscape devices. Create a Kconfig option and move it to defconfig for all boards that have this serial driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Simon Glass <sjg@chromium.org>
| * arm: ls1021atwr: Convert to driver model and enable serial supportBin Meng2016-01-201-0/+2
| | | | | | | | | | | | | | | | Convert ls1021atwr_nor to driver model support. As a start, enable ns16550 serial port driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: add API to enable clockMasahiro Yamada2016-01-201-0/+18
| | | | | | | | | | | | | | | | The most basic thing for clock is to enable it, but it is missing in this uclass. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: add needed include and declaration to include/clk.hMasahiro Yamada2016-01-201-0/+4
| | | | | | | | | | | | | | | | This header uses ulong, so it needs to include <linux/types.h>. Likewise, "struct udevice" must be declared before it is used. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: fix comments in include/clk.hMasahiro Yamada2016-01-201-10/+10
| | | | | | | | | | | | | | | | | | | | The comment about get_periph_rate() is the same as that of set_periph_rate(). I am fixing typos here and there while I am in this file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * bzip2: Support compression for sandboxSimon Glass2016-01-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | Add the missing code to allow bzip2 compression to be used. This is useful for sandbox tests. These files are taken from the bzip2 1.0.6 release. The license text is copied to the top of each file as is done with other bzip2 files in U-Boot. The only other change is to squash a compiler warning with nBytes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ti_omap5_common: timer: do not define CONFIG_TIMER for splMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | | | Since OMAP's spl doesn't support DM currently, do not define CONFIG_TIMER for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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