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* armv8/ls1043ardb: Add sd boot supportGong Qianyu2015-10-292-1/+40
| | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu2015-10-292-1/+12
| | | | | | | | This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/ls1043a: Add Fman supportShaohui Xie2015-10-292-0/+37
| | | | | | | | Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/ls1043ardb: Add nand boot supportGong Qianyu2015-10-292-0/+73
| | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu2015-10-292-0/+363
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
* armv8/fsl_lsch2: Add fsl_lsch2 SoCMingkai Hu2015-10-291-0/+3
| | | | | | | | | | | Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-292-2/+11
| | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net/fm: fix MDIO controller base on FMAN2Shaohui Xie2015-10-291-0/+17
| | | | | | | | | | | | MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two FMANs, so we should only define MDIO controller base on FMAN2 when there is FMAN2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net: Move some header files to include/Shaohui Xie2015-10-293-0/+896
| | | | | | | | | | The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv7/ls1021a: move ns_access to common fileMingkai Hu2015-10-293-2/+36
| | | | | | | | | | Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* common/board_f.c: change the macro name and remove it for PPC platformsGong Qianyu2015-10-2941-40/+18
| | | | | | | | | | For most PPC platforms, they will call the first get_clocks() in init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is then defined to call the second get_clocks(), which should be redundant for PPC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: ls2085ardb: enable CONFIG_PHY_AQUANTIAShaohui Xie2015-10-291-0/+1
| | | | | | | To support on board Aquantia's PHY AQR405. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* crypto/fsl: SEC driver cleanup for 64 bit and endiannessAneesh Bansal2015-10-291-4/+2
| | | | | | | | | | | | | | | | | The SEC driver code has been cleaned up to work for 64 bit physical addresses and systems where endianess of SEC block is different from the Core. Changes: 1. Descriptor created on Core is modified as per SEC block endianness before the job is submitted. 2. The read/write of physical addresses to Job Rings will be depend on endianness of SEC block as 32 bit low and high part of the 64 bit address will vary. 3. The 32 bit low and high part of the 64 bit address in descriptor will vary depending on endianness of SEC. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Pointers in ESBC header made 32 bitAneesh Bansal2015-10-291-7/+7
| | | | | | | | | | For the Chain of Trust, the esbc_validate command supports 32 bit fields for location of the image. In the header structure definition, these were declared as pointers which made them 64 bit on a 64 bit core. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm: ls1021a: Add QSPI or IFC support in SD bootAlison Wang2015-10-261-3/+16
| | | | | | | | | | | | | | As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in SD boot now. For the customer's demand, QSPI needs to be supported in SD boot too. This patch adds QSPI or IFC support in SD boot according to the corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is used to support QSPI in SD boot. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* QE: modify the address of qe ucodeZhao Qiang2015-10-262-2/+2
| | | | | | | The address of uboot changed, so change qe ucode Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm/fsl-ls: Add CONFIG_OF_STDOUT_VIA_ALIASScott Wood2015-10-263-0/+3
| | | | | | | | This will allow OF-based earlycon to be used once the appropriate aliases are added to the device tree and kernel support is fixed. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* common/board_f.c: modify the macro to use get_clocks() more commonGong Qianyu2015-10-2440-0/+40
| | | | | | get_clocks() should not be limited by ESDHC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
* arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada2015-10-24234-257/+0
| | | | | | | | | | | We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* distro_bootcmd: Add support for booting from ubifsRoy Spliet2015-10-241-0/+19
| | | | | | | | | Under the assumptions of having a UBI volume called boot, containing a ubifs filesystem. Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* ubifs: Add generic fs supportHans de Goede2015-10-241-0/+1
| | | | | | | | Add generic fs support, so that commands like ls, load and test -e can be used on ubifs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* ubifs: Add functions for generic fs useHans de Goede2015-10-241-0/+4
| | | | | | | | Implement the necessary functions for implementing generic fs support for ubifs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* ubifs: Modify ubifs u-boot wrapper function prototypes for generic fs useHans de Goede2015-10-241-0/+28
| | | | | | | | | | | Modify the ubifs u-boot wrapper function prototypes for generic fs use, and give them their own header file. This is a preparation patch for adding ubifs support to the generic fs code from fs/fs.c. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* ARM: rpi: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportGuillaume GARDET2015-10-241-0/+1
| | | | | | | | | | | | Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support and enable it to set 'board_rev' and 'board_name' envs. 'board_rev' can be used in scripts to determine what board we are running on and 'board_name' for pretty printing. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* allow LED initialization without STATUS_LED_BOOTBernhard Nortmann2015-10-241-0/+1
| | | | | | | | | | | | | | | | | | | | For current U-Boot to initialize status LEDs via status_led_init(), it is required to have both CONFIG_STATUS_LED and STATUS_LED_BOOT defined. This may be a particular concern with GPIO LEDs, where __led_init() is required to correctly set up the GPIO (gpio_request and gpio_direction_output). Without STATUS_LED_BOOT the initialization isn't called, which could leave the user with a non-functional "led" command - due to the fact that the LED routines in gpio_led.c use gpio_set_value() just fine, but the GPIO never got set up properly in the first place. I think having CONFIG_STATUS_LED is sufficient to justify a corresponding call to status_led_init(), even with no STATUS_LED_BOOT defined. To do so, common/board_r.c needs call that routine, so it now is exposed via status_led.h. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> [trini: Add dummy __led_init to pca9551_led.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: convert altera_tse to driver model and phylibThomas Chou2015-10-231-0/+8
| | | | | | | | Convert altera_tse to driver model and phylib. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: zap nios2-generic board dirThomas Chou2015-10-231-8/+16
| | | | | | | As we use device tree to control u-boot now, the generic board can be removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: convert altera sysid to driver modelThomas Chou2015-10-231-1/+1
| | | | | | | | Convert altera sysid to driver model with misc uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: implement a Miscellaneous uclassThomas Chou2015-10-232-0/+80
| | | | | | | | | Implement a Miscellaneous uclass with generic read or write operations. This class is used only for those do not fit other more general classes. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
* serial: remove altera serial initializationsThomas Chou2015-10-231-2/+0
| | | | | | | | | | Both altera_jtag_serial_initialize() and altera_serial_initialize() are no longer used after they are converted to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* nios2: convert altera timer to driver modelThomas Chou2015-10-231-5/+0
| | | | | | | Convert altera timer to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com>
* dm: implement a Timer uclassThomas Chou2015-10-233-0/+56
| | | | | | | Implement a Timer uclass to work with lib/time.c. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
* nios2 : convert altera_pio to driver modelThomas Chou2015-10-231-20/+1
| | | | | | | | Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: convert altera_uart to driver modelThomas Chou2015-10-231-8/+1
| | | | | | | | Convert altera_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* nios2: convert altera_jtag_uart to driver modelThomas Chou2015-10-231-3/+0
| | | | | | | | Convert altera_jtag_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: Split timer code into timer.cThomas Chou2015-10-231-2/+1
| | | | | | | | Move the timer code from interrupts.c into timer.c . Eliminate the installation of timer interrupt handler, which is no longer used. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: Switch to generic timerThomas Chou2015-10-231-6/+2
| | | | | | | | Zap almost all of the ad-hoc timer code from interrupts.c and use the code in lib/time.c instead. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: move altera_pio_init to board_early_init_rThomas Chou2015-10-231-0/+1
| | | | | | | | As altera_pio_init() uses BSS, it should be moved to board_early_init_r(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* nios2: move command line configuration to KconfigThomas Chou2015-10-231-8/+1
| | | | | | | | | | | This patch moves command line configuration from board header file to board defconfig in the way of Kconfig. The change passed savedefconfig. This fixes warnings such as : "CONFIG_SYS_HUSH_PARSER" redefined, when "Use hush shell" is selected with menuconfig, etc. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* ti_omap5_common: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> asdfsadf
* am437x: Add am437x_gp_evm_defconfig using CONFIG_DMMugunthan V N2015-10-222-0/+47
| | | | | | | | | | Import various DT files for am4372, an43xx pinctrl and am437x-gp-evm from Linux Kernel v4.2 Add config file for this board, enable DM, DM_GPIO, DM_SERIAL and DM_MMC. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* am43xx_evm: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am43xx_evm.h: : switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIALMugunthan V N2015-10-221-1/+5
| | | | | | Tested on am437x gp evm and am437x sk evm Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x_evm: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: k2g: Add config fileLokesh Vutla2015-10-221-0/+59
| | | | | | | | Add config file for k2g Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
* ARM: k2g: Add clock informationVitaly Andrianov2015-10-221-1/+10
| | | | | | | | Add clock information for Galileo Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: dts: k2hk: Enable OF_CONTROL and DMLokesh Vutla2015-10-221-1/+5
| | | | | | | Import k2hk specific DT files from Linux Kernel and enable OF_CONTROL, DM, DM_SERIAL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: spl: Fix stack allocation with CONFIG_SYS_MALLOC_F_LENLokesh Vutla2015-10-221-0/+7
| | | | | | | | | | If CONFIG_SYS_MALLOC_F_LEN is enabled, the stack is moved down to the specified size to make the malloc function available before relocation. But on keystone platforms SYS_SPL_MALLOC is immediately preceding stack, which is causing an overlap with this config enabled. So leave a gap between malloc space and stack space. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ti_omap5_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIALTom Rini2015-10-221-0/+4
| | | | | Tested on J6Eco EVM Signed-off-by: Tom Rini <trini@konsulko.com>
* ti_omap4_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIALTom Rini2015-10-221-1/+5
| | | | | Tested on Pandaboard Signed-off-by: Tom Rini <trini@konsulko.com>
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