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* tegra: nand: make ONFI detection workLucas Stach2012-10-291-0/+1
| | | | | | | | | | | | Add the missing bits to the Tegra NAND driver to make ONFI detection work properly. Also add it to the Tegra default config, as it seems to be a reasonable thing to have it available on all boards that use any kind of NAND. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Seaboard: enable multiple USB portsStephen Warren2012-10-291-0/+1
| | | | | | | | | | | | | | | | The device tree already contains the required configuration for both the USB1 and USB3 ports. Enable the required configuration options to enable both these ports, which in turn allows the USB1 port to be used. Note that on a true Seaboard, this port is typically used as a device port hosting Tegra's USB recovery protocol. However, on the Springbank derivative, this port is the only external USB port, so we enable it as a host port so that USB peripherals may be used. Enabling this port in U-Boot as a host port doesn't prevent the port from reverting to a device port when the CPU is reset into recovery mode. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Harmony: enable ULPI USB portStephen Warren2012-10-291-0/+3
| | | | | | | | | | | | The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: use standard variables to define load addressesStephen Warren2012-10-291-3/+28
| | | | | | | | | | | | | | | | Currently, Tegra's default environment uses non-standard variables to define where boot scripts should load the kernel, FDT, and initrd. This change both changes the variable names to match those described in U-Boot's README, and shuffles their values around a little so that the values make a little more sense; see comments in the patch for rationale behind the values chosen. Note that this patch does remove the old non-standard variable "fdt_load" from the default environment, so this patch requires people to change their boot scripts. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: define CONFIG_SYS_BOOTMAPSZStephen Warren2012-10-292-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This define indicates the size of the memory region where it is safe to place data passed to the Linux kernel (ATAGs, DTB, initrd). The value needs to be: a) Less than or equal to RAM size. b) Small enough that the area is not within the kernel's highmem region, since the kernel cannot access ATAGs/DTB/initrd from highmem. c) Large enough to hold the kernel+DTB+initrd. 256M seems large enough for (c) in most circumstances, and small enough to satisfy (a) and (b) across any possible Tegra board. Note that the user can override this value via environment variable "bootm_mapsize" if needed. The advantage of defining BOOTMAPSZ is that we no longer need to define variable fdt_high in the default environment. Previously, we defined this to prevent the DTB from being relocated to the very end of RAM, which on most Tegra systems is within highmem, and hence which would cause boot failures. A user can still define this variable themselves if they want the FDT to be either left in-place wherever loaded, or copied to some other specific location. Similarly, there should no longer be a strict requirement for the user to define initrd_high if using an initrd. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add Colibri T20 board supportLucas Stach2012-10-291-0/+83
| | | | | | | | | | | | | This adds board support for the Toradex Colibri T20 module. Working functions: - SD card boot - USB boot - Network - NAND environment Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-2711-16/+35
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| * mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-201-2/+1
| | | | | | | | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-201-2/+1
| | | | | | | | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx25pdk: Use internal RAM for stack pointerFabio Estevam2012-10-201-2/+9
| | | | | | | | | | | | Use internal RAM for stack pointer as it is done in other i.MX boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6qsabrelite: enable DCache and MMC bounce bufferDirk Behme2012-10-171-2/+1
| | | | | | | | | | | | | | | | | | The recent U-Boot version 2012.07 has improved drivers (e.g. MMC and network/FEC) regarding DCache handling. So it should be safe to use the DCache on the i.MX6, now. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * configs: mx53evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-171-1/+0
| | | | | | | | | | | | mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * configs: mx51evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-171-1/+0
| | | | | | | | | | | | mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * configs: mx53loco: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-171-1/+0
| | | | | | | | | | | | mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53loco: Adapt the IPU clockFabio Estevam2012-10-171-1/+1
| | | | | | | | | | | | | | Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * i.MX6: mx6qsabrelite: Add splash screen supportEric Nelson2012-10-161-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for HDMI, two LVDS panels and one RGB panel to the SABRE-Lite board. Displays supported: HDMI - 1024 x 768 for maximum compatibility Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) Since the ipuv3_fb display driver currently supports only a single display, this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect or the I2C touch controller of the LVDS and RGB displays in the priority listed above. Setting 'panel' environment variable to one of the names above will override auto-detection. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * i.MX video: struct fb_videomode can be constEric Nelson2012-10-161-1/+3
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * mx6qsabreauto: Change mmcroot so it works out of boxOtavio Salvador2012-10-163-2/+4
| | | | | | | | | | | | | | | | The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we move this to the board configuration file. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mxc: Fix SDHC multi-instance clockBenoît Thébaudeau2012-10-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
* | arm: arm925t: remove SX1 boardAlbert ARIBAUD2012-10-261-189/+0
| | | | | | | | | | | | | | | | | | | | SX1 does not build properly by itself, is not built as part of MAKEALL arm or MAKEALL -a arm, and is only present in Makefile, not boards.cfg. As it also has no entry in MAINTAINERS, it is orphan and non-functional. Remove it. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | stdio: Remove the CLPS7111 serial driverMarek Vasut2012-10-261-276/+0
| | | | | | | | | | | | This driver is no longer used, remove it. Signed-off-by: Marek Vasut <marex@denx.de>
* | arm: Remove support for lpc2292Marek Vasut2012-10-261-1/+0
| | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
* | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-10-262-1/+16
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| * | ARM: at91sam9x5: enable MCI0 support for 9x5ek board.Wu, Josh2012-10-171-0/+10
| | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | mmc: at91: add multi block read/write support.Wu, Josh2012-10-171-1/+6
| | | | | | | | | | | | | | | | | | | | | Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-10-2623-41/+53
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| * | | am33xx: Add SPI SPL as an optionTom Rini2012-10-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * | | OMAP3: add video support to the mcx boardStefano Babic2012-10-251-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add video support to the board with the display focaltech etm070003dh6. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | OMAP3: mcx: updated to new hardware revisionStefano Babic2012-10-251-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some GPIOs differ in the new revision board. Previous revision are considered obsolete and they will not anymore supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | OMAP3: updated pinmux and environment for new revision of mcx boardStefano Babic2012-10-251-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The mcx board was slightly modified and the pinmux must be updated. There is no need to support the old board, that becomes obsolete. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | cm-t35: clean unused defines from configIgor Grinberg2012-10-231-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Neither cm-t35, nor cm-t3730 is using OneNAND or flash. Remove the related defines from config file. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | configs: Fix usage of mmc rescanAndrew Bradford2012-10-2322-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix usage of 'mmc rescan' by many configs. Proper use is 'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan the device. 'mmc rescan' itself does not take any arguments. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
* | | | ColdFire: Add Freescale MCF54418TWR ColdFire development board supportAlison Wang2012-10-241-0/+448
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Freescale MCF54418TWR ColdFire development board support. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | km83xx: add kmvect1 boardGerlando Falauto2012-10-231-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the new kmvect1 board powered by the mpc8309 processor. As this board is very similar to the existing suvd3, instead of adding a new config header file, just add a new config option to suvd3.h Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | km83xx: add common support for km8309 boardsGerlando Falauto2012-10-232-0/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Keymile boards based on mpc8309 (it would be only kmvect1 for now) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> [#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | mpc83xx: add support for mpc8309Gerlando Falauto2012-10-231-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This processor, though very similar to other members of the PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides yet another feature set than any supported sibling. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | cleanup: introduce CONFIG_MPC830xGerlando Falauto2012-10-233-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new configuration token CONFIG_MPC830x to be shared among mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor existing common code so to make future introduction of 8309 simpler. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | cosmetic: suvd3: align #definesGerlando Falauto2012-10-232-3/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-fdtTom Rini2012-10-222-16/+263
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| * \ \ \ Merge branch 'next'Gerald Van Baren2012-10-222-16/+263
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| | * | | | libfdt: Add helper function to create a trivial, empty treeGerald Van Baren2012-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The libfdt read/write functions are now usable enough that it's become a moderately common pattern to use them to build and manipulate a device tree from scratch. For example, we do so ourself in our rw_tree1 testcase, and qemu is starting to use this model when building device trees for some targets such as e500. However, the read/write functions require some sort of valid tree to begin with, so this necessitates either having a trivial canned dtb to begin with or, more commonly, creating an empty tree using the serial-write functions first. This patch adds a helper function which uses the serial-write functions to create a trivial, empty but complete and valid tree in a supplied buffer, ready for manipulation with the read/write functions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> From git://git.jdl.com/software/dtc.git patch hash be6026838 with adaptations to include/libfdt.h and lib/libfdt/Makefile for the U-Boot environment. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
| | * | | | fdt: Check for a token to skip auto-hash validationJoe Hershberger2012-10-151-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the itb file to declare to u-boot that its hash should not be checked automatically on bootm or iminfo. This allows an image to either be checked automatically or to include a script which may check it otherwise (such as after part of the itb has been relocated to RAM by the script). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| | * | | | libfdt: Add helpers for 64-bit integer propertiesDavid Gibson2012-10-151-23/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In device trees in the world, properties consisting of a single 64-bit integer are not as common as those consisting of a single 32-bit, cell sized integer, but they're common enough that they're worth including convenience functions for. This patch adds helper wrappers of fdt_setprop_inplace(), fdt_setprop() and fdt_appendprop() for handling 64-bit integer quantities in properties. For better consistency with the names of these new *_u64() functions we also add *_u32() functions as alternative names for the existing *_cell() functions handling 32-bit integers. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| | * | | | libfdt: Add support for appending the values to a existing propertyMinghuan Lian2012-10-151-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some properties may contain multiple values, these values may need to be added to the property respectively. this patch provides this functionality. The main purpose of fdt_append_prop() is to append the values to a existing property, or create a new property if it dose not exist. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2012-10-2210-7/+982
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| * | | | | | phylib: Enable SMSC LAN87xx PHY supportMingkai Hu2012-10-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAN8720 PHY is used on Freescale C2X0QDS board. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | poweprc/85xx: add QMan frequency info and fdt fixup.Haiying Wang2012-10-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel driver can use it to calculate the shaper prescaler and rate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | powerpc/t4qds: Add T4QDS boardYork Sun2012-10-222-0/+910
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | fm/mEMAC: add mEMAC frame workRoy Zang2012-10-222-3/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The multirate ethernet media access controller (mEMAC) interfaces to 10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface. Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | powerpc/mpc85xx: Add T4240 SoCYork Sun2012-10-221-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T4240 SoC. Feature of T4240 are (incomplete list): 12 dual-threaded e6500 cores built on Power Architecture® technology Arranged as clusters of four cores sharing a 2 MB L2 cache. Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture v2.06-compliant) Three levels of instruction: user, supervisor, and hypervisor 1.5 MB CoreNet Platform Cache (CPC) Hierarchical interconnect fabric CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet end-points 1.6 Tbps coherent read bandwidth Queue Manager (QMan) fabric supporting packet-level queue management and quality of service scheduling Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Memory prefetch engine (PMan) Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: Packet parsing, classification, and distribution (Frame Manager 1.1) Queue management for scheduling, packet sequencing, and congestion management (Queue Manager 1.1) Hardware buffer management for buffer allocation and de-allocation (BMan 1.1) Cryptography acceleration (SEC 5.0) at up to 40 Gbps RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0) 32 SerDes lanes at up to 10.3125 GHz Ethernet interfaces Up to four 10 Gbps Ethernet MACs Up to sixteen 1 Gbps Ethernet MACs Maximum configuration of 4 x 10 GE + 8 x 1 GE High-speed peripheral interfaces Four PCI Express 2.0/3.0 controllers Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with Type 11 messaging and Type 9 data streaming support Interlaken look-aside interface for serial TCAM connection Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Four I2C controllers Four 2-pin or two 4-pin UARTs Integrated Flash controller supporting NAND and NOR flash Two eight-channel DMA engines Support for hardware virtualization and partitioning enforcement QorIQ Platform's Trust Architecture 1.1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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