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* CONFIG_NEEDS_MANUAL_RELOC: Fix warnings when not setTom Rini2015-12-071-4/+1
| | | | | | | | | Now that we may compile (but not link) code calling fixup_cmdtable when this is not set, we need to always have the declaration available. We should also make sure that anyone calling the function includes <command.h> as that's where the function declaration is. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-0710-50/+11
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| * ARM: zynq: Extend malloc sizeMichal Simek2015-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL DM MMC FAT requires more malloc space(3k fat buffers + dm) that it is available now. Extend SPL malloc space. Current OCM layout: 0xffff0000 - 0xfff2000 - Full malloc space 0xffff2000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix location of stack and malloc areasMichal Simek2015-12-071-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch "board_init: Change the logic to setup malloc_base" (sha1: 9ac4fc82071ce346e3885118242ff45d22f69b82) breaks SPL for Zynq because it puts early alloc area on the stack which caused that stack was decreased by CONFIG_SYS_MALLOC_F_LEN (0x400) and there was not enough space for regular stack. This patch changes memory layout to better utilize the last 64k OCM block. 0xffff0000 - 0xfff1000 - Full malloc space 0xffff1000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Moritz Fischer <moritz.fischer@ettus.com>
| * ARM64: zynqmp: Enable FIT config option via KconfigMichal Simek2015-12-071-3/+0
| | | | | | | | | | | | Remove configuration options from board file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Move gem to KconfigMichal Simek2015-12-079-27/+2
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * net: gem: Move driver to DMMichal Simek2015-12-072-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | - Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * net: gem: Remove zynq_gem_of_init()Michal Simek2015-12-071-1/+0
| | | | | | | | | | | | | | | | | | This function was used for OF init before DM. Remove this function as the part of move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: zynq: Remove CONFIG_APIMichal Simek2015-12-071-1/+0
| | | | | | | | | | | | | | | | CONFIG_API is causing compilation error when DM_ETH is enabled because eth_get_dev() is not available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: zynq: Remove PHYLIB from config to defconfigMichal Simek2015-12-071-1/+0
| | | | | | | | | | | | | | Move PHYLIB from board config to defconfig Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | Merge git://git.denx.de/u-boot-usbTom Rini2015-12-064-1/+11
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| * | usb: xhci: zynqmp: Removing unused function usb_phy_resetMarek Vasut2015-12-071-1/+0
| | | | | | | | | | | | | | | | | | | | | This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de>
| * | drivers:usb:fsl: Add T4080 as affected soc for Erratum A007792 sw workaroundRajesh Bhagat2015-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Apply Erratum A007792 sw workaround for T4080 Signed-off-by: Sriram Dash <sriram.dash@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| * | usb: zynqmp: Enable USB XHCI supportSiva Durga Prasad Paladugu2015-12-071-0/+8
| | | | | | | | | | | | | | | | | | Enable USB XHCI support for ZynqMP Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | usb: zynqmp: Add XHCI driver supportSiva Durga Prasad Paladugu2015-12-071-0/+2
| |/ | | | | | | | | | | Added USB XHCI driver support for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* | arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-071-0/+115
|/ | | | | | | | | | | | | | | The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMSMarek Vasut2015-12-055-5/+0
| | | | | | | | | This symbol is no longer used anywhere, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Acked-by: Heiko Schocher <hs@denx.de>
* Fix typo: commmand -> command.Vagrant Cascadian2015-12-051-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sparcTom Rini2015-12-045-22/+22
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| * sparc: Add CONFIG_DISPLAY_BOARDINFO variable to all LEON boardsFrancois Retief2015-12-035-5/+10
| | | | | | | | Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: leon2: Updates for generic board initializationFrancois Retief2015-12-031-2/+4
| | | | | | | | | | | | | | | | | | | | Reworked the LEON2 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON2 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: leon3: Updates for generic board initializationFrancois Retief2015-12-034-0/+8
| | | | | | | | | | | | | | | | | | | | Reworked the LEON3 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON3 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: Move SYS_SPARC_NWINDOWS to KconfigFrancois Retief2015-12-035-15/+0
| | | | | | | | Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-12-043-8/+67
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| * arm: imx6: novena: Enable extfs support in SPLMarek Vasut2015-12-011-0/+1
| | | | | | | | | | | | | | | | Simple patch to enable support for extfs filesystem in SPL, this is useful to those who want to avoid vfat like plague. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * cgtqmx6eval: Add DFU supportOtavio Salvador2015-11-251-0/+10
| | | | | | | | | | | | | | Add MMC and SPI DFU support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPL supportOtavio Salvador2015-11-251-1/+21
| | | | | | | | | | | | | | | | | | Congatec has several MX6 boards based on quad, dual, dual-lite and solo. Add SPL support so that all the variants can be supported Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add fastboot supportOtavio Salvador2015-11-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested basic fastboot commands, such as: On the U-boot prompt: => fastboot 0 On the host PC: $ fastboot getvar bootloader-version -i 0x0525 bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27 finished. total time: 0.000s $ fastboot reboot -i 0x0525 --> board reboots fine. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Use SPI NOR to store the environmentOtavio Salvador2015-11-251-4/+14
| | | | | | | | | | | | | | | | Congatec boards boot from SPI NOR, so it makes more sense to use SPI NOR to store the environment variables. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPI NOR flash supportOtavio Salvador2015-11-251-0/+12
| | | | | | | | | | | | | | | | | | | | Add SPI NOR support: => sf probe SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: mx6: Reduce SPL malloc pool sizeMarek Vasut2015-11-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | iocon: Disable FIT_VERBOSETom Rini2015-12-011-2/+0
| | | | | | | | | | | | In order to fit into image constraints again, remove this feature. Signed-off-by: Tom Rini <trini@konsulko.com>
* | rockchip: move SYS_MALLOC_SIMPLE to mach-rockchip KconfigAriel D'Alessandro2015-12-012-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1eb0c03c2198a7ec9de456b83dacdc4831b96cbf added SPL_SYS_MALLOC_SIMPLE Kconfig option and changed the way it is evaluated. Thus, the definitions of CONFIG_SYS_MALLOC_SIMPLE in rk3***_common.h board configs are now incorrect because CONFIG_SPL_BUILD is enabled so CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) will look for SPL_SYS_MALLOC_SIMPLE instead of SYS_MALLOC_SIMPLE. This commit fix this enabling SPL_SYS_MALLOC_SIMPLE with the new Kconfig option by default in rockchip-mach. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Add basic support for evb-rk3036 boardhuang lin2015-12-011-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
* | rockchip: rk3036: Add core Soc start-up codehuang lin2015-12-011-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
* | mmc: dw_mmc: support fifo mode in dwc mmc driverhuang lin2015-12-011-0/+5
| | | | | | | | | | | | | | | | some soc(rk3036 etc) use dw_mmc but do not have internal dma, so we implement fifo mode to read and write data. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Bring in RK3036 device tree file includes and bindingshuang lin2015-12-011-0/+186
| | | | | | | | | | | | | | | | | | Since rk3036 device tree file still in reviewing, bring it from https://patchwork.kernel.org/patch/7203371/ and add some aliases we need in uboot Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: add config decide whether to build common.chuang lin2015-12-011-0/+3
| | | | | | | | | | | | | | | | some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: add timer driverhuang lin2015-12-011-1/+2
| | | | | | | | | | | | | | | | some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: firefly: Save the environment on SD cardSjoerd Simons2015-12-013-1/+9
| | | | | | | | | | | | | | | | Save the environment on the SD card for Firefly in the empty space between the SPL and the u-boot image. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Also load the initrd below 512MSjoerd Simons2015-12-011-0/+1
| | | | | | | | | | | | | | | | | | Similar to load an fdt, when loading an initrd about the 512Mb mark things seem to break. For now force loading below 512Mb until the reason why this fails has been determined/solved. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Disable PCI compatibility functions by defaultSimon Glass2015-12-011-4/+26
| | | | | | | | | | | | | | | | | | We eventually need to drop the compatibility functions for driver model. As a first step, create a configuration option to enable them and hide them when the option is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Convert 'pci' command to driver modelSimon Glass2015-12-011-1/+0
| | | | | | | | | | | | | | | | | | Adjust this command to use the correct PCI functions, instead of the compatibility layer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Add a comment about how to find struct pci_controllerSimon Glass2015-12-011-0/+2
| | | | | | | | | | | | | | | | With driver mode, struct pci_controller is stored as uclass-private data. Add a comment to that effect. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: tegra: pci: Convert tegra boards to driver model for PCISimon Glass2015-12-011-4/+0
| | | | | | | | | | | | | | | | | | Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: pci: Add a function to find the regions for a PCI busSimon Glass2015-12-011-0/+12
| | | | | | | | | | | | | | | | | | This function looks up the controller and returns a pointer to each region type. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: pci: Add a function to get the controller for a busSimon Glass2015-12-011-0/+8
| | | | | | | | | | | | | | | | | | A PCI bus may be a bridge device where the controller is the bridge's parent. Add a function to return the controller device, given a PCI device. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: pci: Add functions to emulate 8- and 16-bit accessSimon Glass2015-12-011-0/+31
| | | | | | | | | | | | | | | | | | Provide a few functions to support using 32-bit access to emulate 8- and 16-bit access. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: pci: Avoid a driver model build error with CONFIG_CMD_PCI_ENUMSimon Glass2015-12-016-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | This is not supported with driver model, so print a message instead of generating a build error. Rescanning PCI is not yet implemented. This function will be implemented later once some additional PCI driver model improvements are merged. It was confirmed on the mailing list that no one on the tegra side will miss this feature, so it is disabled for tegra. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: tegra: pci: Move CONFIG_PCI_TEGRA to KconfigSimon Glass2015-12-016-6/+0
| | | | | | | | | | | | | | Move this option to Kconfig and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
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