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* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-01-263-12/+3
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| * power: axp: merge separate DLDO functions into 1Chen-Yu Tsai2016-01-261-4/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of one function for each DLDO regulator, make 1 function that takes an extra "index". Since the control bits for the DLDO regulators are contiguous, this makes the function very simple. This removes a lot of duplicate code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp818: Remove duplicate register definition macrosChen-Yu Tsai2016-01-261-8/+0
| | | | | | | | | | | | | | | | Some of the register definitions are duplicated. Drop them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Implement poweroff support for axp221 pmicHans de Goede2016-01-261-0/+2
| | | | | | | | | | | | | | Adds poweroff support for axp221 pmic. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-01-265-7/+9
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| * | video: add CONFIG_I2C_EDID and disable CONFIG_DISPLAY by defaultAnatolij Gustschin2016-01-264-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling CONFIG_DISPLAY breaks building for some architectures (microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig by default and enable this option in defconfigs. CONFIG_DISPLAY depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | lcd: fix the color testpattern in 16bit modeAndreas Neubacher2016-01-241-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The testpattern of the lcd was only working in 8bit mode(2x3 tiles in different colors). With this patch now 8bit and 16bit is supported. In 16bit mode there are 2x4 tiles in different colors. The number of LCD-colors is defined in the include/configs/<boardfile>.h Signed-off-by: Andreas Neubacher <neubacher.andreas@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-01-252-1/+11
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| * | | usb: eth: add Realtek RTL8152B/RTL8153 DRIVERTed Chen2016-01-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver support for the Realtek RTL8152B/RTL8153 USB network adapters. Signed-off-by: Ted Chen <tedchen at realtek.com> [swarren, fixed a few compiler warnings] [swarren, with permission, converted license header to SPDX] [swarren, removed printf() spew during probe()] Signed-off-by: Stephen Warren <swarren at nvidia.com>
| * | | ARM: rpi: enable USB keyboardStephen Warren2016-01-231-1/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the DWC2 driver supports split transactions, we can reasonably enable support for USB keyboards. This wasn't terribly useful before since keyboards are usually LS/FS devices, and thus require split transaction support when attached to a USB hub such as the hub built into the RPi model Bs. Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-251-0/+10
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| * | powerpc/board/t4240rdb: Enable VID supportYing Zhang2016-01-251-0/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2016-01-255-1/+32
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| * | imx: spl: enable CONFIG_SPL_WATCHDOG_SUPPORTPeng Fan2016-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit 4bdcbe60a142b08eefccb0e326a37ba81d3389e8 removes reset_cpu which breaks SPL build when DEBUG macro defined. " arch/arm/lib/built-in.o: In function `do_reset': ~/uboot/arch/arm/lib/reset.c:45: undefined reference to `reset_cpu' scripts/Makefile.spl:244: recipe for target 'spl/u-boot-spl' failed " Enable CONFIG_SPL_WATCHDOG_SUPPORT to fix this issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Eric Nelson <eric@nelint.com>
| * | imx: mx7dsabresd: support nandPeng Fan2016-01-241-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinmux settings. Add related macro definitions. Nand pin conflicts with emmc, so if want to enable nand, need to do hardware rework. After hardware rework, define CONFIG_NAND_MXS in board header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6ulevk: add CONFIG_SPI_FLASH_STMICROPeng Fan2016-01-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_SPI_FLASH_STMICRO to let qspi driver can detect the qspi chips. " => sf probe SF: Detected N25Q256 with page size 256 Bytes, erase size 64 KiB, total 32 MiB " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | imx: mx6/7 enlarge CONFIG_SYS_BOOTM_LEN to 16MPeng Fan2016-01-242-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support uncompressing zImage which is larger than 8M. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6ulevk: change mtest memory size to 128MPeng Fan2016-01-241-1/+1
| |/ | | | | | | | | | | | | | | | | To i.MX6UL 14x14 EVK, system memory is 512M; to i.MX6UL 9x9 EVK, system memory is 256M. If setting mtest size to 256M, mtest will crash uboot for i.MX6UL 9x9 evk. So change mtest size to 128M. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* | OMAP: Define CONFIG_OMAP3_GPIO_6 on omap3_logicAdam Ford2016-01-251-0/+3
| | | | | | | | | | | | | | | | Since we are manipulating GPIO 189 to determine the board type, we need to enable the GPIO Bank 6. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | igep00x0: remove #undef CONFIG_BOOTDELAYLadislav Michl2016-01-251-2/+0
| | | | | | | | | | | | | | | | Do not undefine CONFIG_BOOTDELAY, so board can boot without user intervention. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* | bug.h: move BUILD_BUG_* defines to include/linux/bug.hMasahiro Yamada2016-01-252-3/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BUILD_BUG_* macros have been defined in several headers. It would be nice to collect them in include/linux/bug.h like Linux. This commit is cherry-picking useful macros from include/linux/bug.h of Linux 4.4. I did not import BUILD_BUG_ON_MSG() because it would not work if it is used with include/common.h in U-Boot. I'd like to postpone it until the root cause (the "error()" macro in include/common.h causes the name conflict with "__attribute__((error()))") is fixed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | lib: Add wait_for_bitMateusz Kulikowski2016-01-251-0/+71
| | | | | | | | | | | | | | | | Add function to poll register waiting for specific bit(s). Similar functions are implemented in few drivers - they are almost identical and can be generalized. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | part: Drop duplication declaration of block_dev_desc_tSimon Glass2016-01-251-2/+0
| | | | | | | | | | | | | | | | | | | | This is already defined in ide.h, which part.h includes. So we don't need the duplicate typedef. At least with my old blackfin gcc 4.3.5 tool chain, this causes an error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ahci: Add a disk-controller uclassSimon Glass2016-01-241-0/+1
| | | | | | | | | | | | | | | | | | Add a uclass ID for a disk controller. This can be used by AHCI/SATA or other controller types. There are no operations and no interface so far, but it is possible to probe a SATA device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: x86: Add a northbridge uclassSimon Glass2016-01-241-0/+1
| | | | | | | | | | | | | | | | Add a uclass for the northbridge / SDRAM controller found on some older Intel chipsets. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Convert bios_emu to use the driver model PCI APISimon Glass2016-01-241-1/+18
| | | | | | | | | | | | | | | | At present this BIOS emulator uses a bus/device/function number. Change it to use a device if CONFIG_DM_PCI is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: syscon: Allow finding devices by driver dataSimon Glass2016-01-241-0/+14
| | | | | | | | | | | | | | | | We have a way to find a regmap by its syscon driver data value. Add the same for syscon itself. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: Drop the irq router compatible stringSimon Glass2016-01-241-1/+0
| | | | | | | | | | | | | | We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: x86: Set up interrupt routing from interrupt_init()Simon Glass2016-01-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init(). This removes the manual pirq_init() call. Where the platform does not have an interrupt router defined in its device tree, no error is generated. Some platforms do not have this. Drop pirq_init() since it is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: x86: Create a driver for x86 interruptsSimon Glass2016-01-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems likely that at some point we will want a generic interrupt uclass. But this is a big undertaking as it involves unifying code across multiple architectures. As a first step, create a simple IRQ uclass and a driver for x86. This can be generalised later as required. Adjust pirq_init() to probe this driver, which has the effect of creating routing tables and setting up the interrupt routing. This is a start towards making interrupts fit better with driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: x86: Add a driver for Intel PCH7Simon Glass2016-01-241-0/+4
| | | | | | | | | | | | | | | | | | At some point we may need to distinguish between different types of PCHs, but for existing supported platforms we only need to worry about version 7 and version 9 bridges. Add a driver for the PCH7. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: Expand the uclass for Platform Controller Hubs (PCH)Simon Glass2016-01-241-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A Platform Controller Hub is an Intel concept - it is like the peripherals on an SoC and is often in a separate chip from the CPU. The chip is typically found on the first PCI bus and integrates multiple devices. We have a very simple uclass to support PCHs. Add a few operations, such as setting up the devices on the PCH and finding the SPI controller base address. Also move it into drivers/pch/ since we will be adding a few PCH drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Add a function to write a BARSimon Glass2016-01-241-2/+15
|/ | | | | | | | Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* rockchip: Add support for Raxda Rock 2Simon Glass2016-01-211-0/+31
| | | | | | | | | | | | This board includes an RK3288 SoC on a SOM. It can be mounted on a base-board which provides a wide range of peripherals. So far this is verified to boot to a prompt from a microSD card. The serial console works as well as HDMI. Thanks to Tom Cubie for sending me a board. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: firefly-rk3288: Enable HDMI outputSimon Glass2016-01-211-1/+8
| | | | | | Enable HDMI output and a console on firefly. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Enable EDP and HDMI video outputSimon Glass2016-01-211-2/+6
| | | | | | | | | | | Enable these devices using the VOPL video output device. We explicitly disable VOPB in the device tree to avoid it taking over. Since this device has an LCD display this comes up by default. If the display fails for some reason then it will attempt to use HDMI. It is possible to force it to fail (and thus fall back to HDMI) by puting 'return -EPERM' at the top of rk_edp_probe(). For now there is no easy way to select between the two. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Add support for timing SPI flash speedSimon Glass2016-01-211-0/+3
| | | | | | | Add the 'time' and 'sf test' commands so that we can test SPI flash performance. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spl: Support full-speed CPU in SPLSimon Glass2016-01-211-0/+3
| | | | | | | | Add a feature which speeds up the CPU to full speed in SPL to minimise boot time. This is only supported for certain boards (at present only jerry). Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: config: Enable the 'gpio' commandSimon Glass2016-01-211-0/+1
| | | | | | | Now that we have a pretty good GPIO driver, enable the 'gpio' command on all rockchip boards. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Don't skip low-level initSimon Glass2016-01-211-1/+0
| | | | | | | At present the low-level init is skipped on rockchip. Among other things this means that the instruction cache is left disabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: video: Repurpose the 'displayport' uclass to 'display'Simon Glass2016-01-213-13/+23
| | | | | | | | | | | | | | The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and LVDS LCD displays. Generalise the uclass so that it can be used with these devices as well. Adjust the uclass to handle the EDID reading and conversion to display_timing internally. Also update nyan-big which is affected by this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: panel: Add a panel uclassSimon Glass2016-01-212-0/+32
| | | | | | | | LCD panels can usefully be modelled as their own uclass. They can be probed (which powers them up ready for use). If they have a backlight, this can be enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: backlight: Add a backlight uclassSimon Glass2016-01-212-0/+32
| | | | | | | | LCD panels normally have a backlight which can be controlled to illuminate the LCD contents. Add a uclass to support this. Initially it only has a method to enable the backlight. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pwm: Add a PWM uclassSimon Glass2016-01-212-0/+54
| | | | | | | Add a uclass that supports Pulse Width Modulation (PWM) devices. It provides methods to enable/disable and configure the device. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Add a function to control cache flushingSimon Glass2016-01-211-0/+8
| | | | | | Allow the cache-flushing function of a video device to be controlled. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Name consoles by their numberSimon Glass2016-01-211-4/+4
| | | | | | | | | | | | We must use the console name in the 'stdout' variable to select the one we want. At present the name is formed from the driver name with a suffix indicating the rotation value. It seems better to name them sequentially since this can be controlled by driver order. So adjust the code to use 'vidconsole' for the first, 'vidconsole1' for the second, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Enable the Chrome OS ECSimon Glass2016-01-213-0/+16
| | | | | | Turn on the EC and enable the keyboard. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Export uclass_find_device_by_of_offset()Simon Glass2016-01-211-0/+16
| | | | | | | | It is sometimes useful to be able to find a device before probing it, perhaps to set up some platform data for it. Allow finding by of_offset also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pinctrl: Add a way for a GPIO driver to obtain a pin functionSimon Glass2016-01-211-0/+32
| | | | | | | | | | | | | GPIO drivers want to be able to show if a pin is enabled for input, output, or is being used by another function. Some drivers can easily find this and the code is included in the driver. For some SoCs this is more complex. Conceptually this should be handled by pinctrl rather than GPIO. Most pinctrl drivers will have this feature anyway. Add a method by which a GPIO driver can obtain the pin mux value given a GPIO reference. This avoids repeating the code in two places. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Drop unused optionsSimon Glass2016-01-211-0/+2
| | | | | | | To reduce the SPL image size, drop the LED features. Jerry does not have an LED and we can leave out GPIO support also. Signed-off-by: Simon Glass <sjg@chromium.org>
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