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* dm: usb: tegra: Drop legacy USB codeSimon Glass2015-06-101-3/+0
| | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move CONFIG_SANDBOX_SERIAL to KconfigSimon Glass2015-06-102-1/+6
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* Remove SPL undefine of CONFIG_OF_CONTROLSimon Glass2015-06-101-0/+2
| | | | | | | Allow SPL to be built with this option so that we can support device tree control. Disable the simple bus for now in SPL. It may be needed later. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver modelSimon Glass2015-06-101-1/+1
| | | | | | | | This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* Remove typedefs from bmp_layout.hSimon Glass2015-06-101-9/+8
| | | | | | | | | We try to avoid typedefs and these ones are easy enough to remove. Before changing this header in the next patch, remove the typedefs. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: Allow cleanup_before_linux() without disabling cachesSimon Glass2015-06-101-0/+15
| | | | | | | | This function is used before jumping to U-Boot, but in that case we don't always want to disable caches. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
* arm: spl: Add an API to detect when U-Boot is started from SPLSimon Glass2015-06-101-0/+13
| | | | | | | | | | | | | | | | | | | | | | | For secure boot systems it is common to have a read-only U-Boot which starts the machine and jumps to a read-write U-Boot for actual booting the OS. This allows the read-write U-Boot to be upgraded without risk of permanently bricking the machine. In the event that the read-write U-Boot is corrupted, the read-only U-Boot can detect this with a checksum and boot into a recovery flow. To support this, add a way to detect when U-Boot is run from SPL as opposed to some other method, such as booted directly (no SPL) or started from another source (e.g. a primary U-Boot). This works by putting a special value in r0. For now we rely on board-specific code to actually check the register and set a flag. At some point this could be generalised, perhaps by using a spare register and passing a flag to _main and/or board_init_f(). This commit does not implement any feature, but merely provides the API for boards to implement. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add compatibility functions for dm_i2c_reg_read/write()Simon Glass2015-06-101-0/+6
| | | | | | | | Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-06-101-0/+1
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| * sunxi: Enable CONFIG_SYS_64BIT_LBA when AHCI is usedBernhard Nortmann2015-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has no support for the (GPT) partioning scheme of large disks > 2TB. While the AHCI driver seems to handle this nicely, the problem is that lbaint_t values get truncated to 32-bit. This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all SoCs that support AHCI (CONFIG_SUNXI_AHCI). Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2015-06-107-962/+4
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| * | avr32: delete non generic board's atstk100{3, 4, 6}Andreas Bießmann2015-06-103-468/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board mimc200Andreas Bießmann2015-06-101-176/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board hammerheadAndreas Bießmann2015-06-101-147/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board favr-32-ezkitAndreas Bießmann2015-06-101-171/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | atngw100: convert to generic boardAndreas Bießmann2015-06-101-0/+4
| |/ | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | tegra: config: nyan-big: Add options required by Chrome OS bootSimon Glass2015-06-091-0/+5
| | | | | | | | | | | | | | | | | | | | We need to match the device tree in the FIT with the U-Boot model so we can automatically select the right device tree. Also adjust the load address so that the device tree is not in the way when a zImage kernel tries to extract itself. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: config: Allow Chrome OS environment settings to be includedSimon Glass2015-06-091-1/+6
| | | | | | | | | | | | | | Bring these in if they are provided by the board. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Increase maximum arguments to 32Simon Glass2015-06-091-1/+1
| | | | | | | | | | | | | | | | When setting up large environment variables we can exceed 16 arguemnts. Increase this to avoid problems. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | dm: tegra: cros_ec: Enable Chrome OS EC on Nyan-bigSimon Glass2015-06-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Enable the EC and keyboard, using the SPI bus. The EC driver requires a particular format and a deactivation delay. Also U-Boot does not support interrupts. For now, adjust the device tree to comply. At some point we should tidy this up to support interrupts and make tegra and exynos use the same setup. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: cros_ec: Add tegra support for Chrome OS ECSimon Glass2015-06-091-1/+7
|/ | | | | | | | This requires a change to stdin to include the 'cros-ec-keyb' input device. Put this in the common file, enabled by the relevant CONFIG. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* pepper: Implement Board Detection mechanismAdam YH Lee2015-06-081-0/+2
| | | | | | | | | | | | AM335x-based 'Gumstix Pepper' SBCs and variants use different types of RAM (DDR2 vs DDR3 with DDR3 being the default). Detect the board type by reading the factory-programmed EEPROM [1] and use this to select any runtime boot options such as RAM type. [1] http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com> Signed-off-by: Ash Charles <ashcharles@gmail.com>
* autoboot.c: Add feature to stop autobooting via SHA256 encrypted passwordStefan Roese2015-06-081-0/+14
| | | | | | | | | | | | | This patch adds the feature to only stop the autobooting, and therefor boot into the U-Boot prompt, when the input string / password matches a values that is encypted via a SHA256 hash and saved in the environment. This feature is enabled by defined these config options: CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_STOP_STR_SHA256 Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* autoboot.c: Move config options to KconfigStefan Roese2015-06-0840-219/+2
| | | | | | | | | | | | | | | | | | | This patch moves the following config options to Kconfig: CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_PROMPT CONFIG_AUTOBOOT_DELAY_STR CONFIG_AUTOBOOT_STOP_STR AUTOBOOT_KEYED_CTRLC Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Drop ip04 and pm9263 configs/ additions, those boards previously set CONFIG_AUTOBOOT_PROMPT but never used it, re-run savedefconfig over all boards that did change. Make digsy_mtc_* string include seconds to match others and not warn. ] Signed-off-by: Tom Rini <trini@konsulko.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-06-086-18/+43
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| * colibri-vf: Enable SPI supportBhuvanchandra DV2015-06-081-0/+7
| | | | | | | | | | Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch>
| * colibri_vf: Enable GPIO supportBhuvanchandra DV2015-06-081-0/+5
| | | | | | | | | | Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
| * mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SXFabio Estevam2015-06-082-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8183058188cd2d942 ("imx6: centralise common boot options in mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6 SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct. DDR on mx6sx/mx6sl starts at 0x80000000. Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl, so that these SoCs can boot again. Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move its setting prior to the inclusion of mx6_common.h. Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
| * wandboard: Add board revision detection supportFabio Estevam2015-06-081-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two revisions of wandboard: version B1 and C1. Add the revision detection support, so that the correct dtb file can be automatically loaded. Based on the patch from Richard Hu <hakahu@gmail.com>. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Tested-By: Vagrant Cascadian <vagrant@aikidev.net>
| * arm: mx6: tqma6: use default CONFIG_SYS_PBSIZEMarkus Niebel2015-06-011-4/+0
| | | | | | | | | | | | | | | | | | this removes a config entry and uses the default value defined in config_fallbacks.h. This implements the same behaviour as a patch series for other i.MX6 boards from Freescale Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * arm: mx6: tqma6: fix spelling error in conditionMarkus Niebel2015-06-011-2/+2
| | | | | | | | Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * warp: Add fuse command supportFabio Estevam2015-05-281-0/+4
| | | | | | | | | | | | Select the fuse command support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Enable CONFIG_SUPPORT_EMMC_BOOTFabio Estevam2015-05-281-0/+1
| | | | | | | | | | | | | | CONFIG_SUPPORT_EMMC_BOOT is important to enable the boot partition via 'mmc partconf 0 1 1 0' command, for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Fix CONFIG_SYS_FSL_ESDHC_ADDRFabio Estevam2015-05-281-1/+1
| | | | | | | | | | | | | | Warp uses eMMC connected to esdhc2 port, so fix CONFIG_SYS_FSL_ESDHC_ADDR to reflect that. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Adjust CONFIG_SYS_DFU_DATA_BUF_SIZEFabio Estevam2015-05-281-1/+1
| | | | | | | | | | | | | | | | | | Adjust CONFIG_SYS_DFU_DATA_BUF_SIZE in order to avoid the following error when running the dfu command: => dfu 0 mmc 0 dfu_get_buf: Could not memalign 0x2000000 bytes Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge git://git.denx.de/u-boot-fdtTom Rini2015-06-051-0/+27
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| * | fdt: Documentation for a few support functions aside their prototypesPaul Kocialkowski2015-06-051-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | This instroduces comments that explain the purpose, parameters and return codes of a few fdt support functions, that are used to fill the fdt. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Simon Glass <sjg@chromium.org>
| * | fdt: Pass the device serial number through devicetreePaul Kocialkowski2015-06-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before device-tree, the device serial number used to be passed to the kernel using ATAGs (on ARM). This is now deprecated and all the handover to the kernel should now be done using device-tree. Thus, this passes the serial-number property to the kernel using the serial-number property of the root node, as expected by the kernel. The serial number is a string that somewhat represents the device's serial number. It might come from some form of storage (e.g. an eeprom) and be programmed at factory-time by the manufacturer or come from identification bits available in e.g. the SoC. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Simon Glass <sgj@chromium.org>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2015-06-053-13/+19
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| * | | gpio: fix typos in GPIO headerMasahiro Yamada2015-06-041-8/+8
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | dm: Sort the uclass IDs after the tegra/PMIC additionSimon Glass2015-06-041-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy up the sort order again. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | sandbox: Tidy up terminal restoreSimon Glass2015-06-041-0/+8
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | For some reason 'u-boot -D' does not restore the terminal correctly when the 'reset' command is used. Call the terminal restore function explicitly in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | | x86: minnowmax: initialize the pin-muxing from device treeGabriel Huau2015-06-041-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-042-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Implement PIRQ routingBin Meng2015-06-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support QEMU PIRQ routing via device tree on both i440fx and q35 platforms. With this commit, Linux booting on QEMU from U-Boot has working ATA/SATA, USB and ethernet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Make host bridge (b.d.f=0.0.0) visibleBin Meng2015-06-042-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default weak version of pci_skip_dev() in drivers/pci/pci_common.c skips the host bridge (b.d.f = 0.0.0) which is actually the i440fx/q35 chipset for QEMU targets. Define CONFIG_PCI_CONFIG_HOST_BRIDGE to make it visible in the PCI configuration space. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: quark: Implement PIRQ routingBin Meng2015-06-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Quark SoC has the same interrupt routing mechanism as the Queensbay platform, only the difference is that PCI devices' INTA/B/C/D are harcoded and cannot be changed freely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Refactor PIRQ routing supportBin Meng2015-06-042-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Add ATA/SATA supportBin Meng2015-06-042-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | Enable legacy IDE support on the pc target and AHCI support on the q35 target. Default configuration is to support the pc target. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.hBin Meng2015-06-041-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed by cmd_ide.c which is not common for modern x86 targets, hence remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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