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* rsa: add sha256-rsa2048 algorithmHeiko Schocher2014-03-213-0/+58
| | | | | | | | | | | | | | | | | | | | | based on patch from andreas@oetken.name: http://patchwork.ozlabs.org/patch/294318/ commit message: I currently need support for rsa-sha256 signatures in u-boot and found out that the code for signatures is not very generic. Thus adding of different hash-algorithms for rsa-signatures is not easy to do without copy-pasting the rsa-code. I attached a patch for how I think it could be better and included support for rsa-sha256. This is a fast first shot. aditionally work: - removed checkpatch warnings - removed compiler warnings - rebased against current head Signed-off-by: Heiko Schocher <hs@denx.de> Cc: andreas@oetken.name Cc: Simon Glass <sjg@chromium.org>
* fit: add sha256 supportHeiko Schocher2014-03-211-0/+9
| | | | | | | add sha256 support to fit images Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* sandbox: config: Enable cros_ec emulation and related itemsSimon Glass2014-03-172-5/+34
| | | | | | | | | Enable the Chrome OS EC emulation for sandbox along with LCD, sound expanded GPIOs and a few other options to make this work correctly. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Allow Ctrl-C to work in sandboxSimon Glass2014-03-171-1/+5
| | | | | | | | | | | It is useful for Cltl-C to be handled by U-Boot as it is on other boards. But it is also useful to be able to terminate U-Boot with Ctrl-C. Add an option to enable signals while in raw mode, and make this the default. Add an option to leave the terminal cooked, which is useful for redirecting output. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Deal with conflicting getenv() for SDLSimon Glass2014-03-171-0/+5
| | | | | | | | | | | | | | | Unfortunately SDL requires getenv() to operate, since it wants to figure out the display type. U-Boot has its own getenv() and they conflict. As a work-around use #define to resolve the conflict. A better but more complex solution might be to rename some U-Boot symbols at link time. SDL audio is not functional at present, likely due to a related issue. Note: Vic Yank wrote a script for this, filed in crbug.com/271125. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* sound: Move Samsung-specific code into its own fileSimon Glass2014-03-172-0/+10
| | | | | | | | | | | | The i2s code is in fact Samsung-specific, but there might be other implementation. Move this code into its own file. This makes it slightly more obviously how to adjust the code to support another SoC, when someone takes this task on. Also drop non-FDT support, since it isn't used on Exynos 5. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add LCD driverSimon Glass2014-03-172-0/+4
| | | | | | | | | | | | | Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add os_jump_to_image() to run another executableSimon Glass2014-03-171-0/+19
| | | | | | | | For some tests it is useful to be able to run U-Boot again but pass on the same memory contents. Add a function to achieve this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Implement I2C pass-throughSimon Glass2014-03-171-0/+14
| | | | | | | | | The Chrome EC has a feature where you can access its I2C buses through a pass-through arrangement. Add a command to support this, and export the function for it also. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: sandbox: Add Chrome OS EC emulationSimon Glass2014-03-172-0/+22
| | | | | | | | Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: spi: Add support for EC protocol version 3Randall Spangler2014-03-171-0/+13
| | | | | | | | | Protocol version 3 will be attempted first; if the EC doesn't support it, u-boot will fall back to the old protocol version (2). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Clean up multiple EC protocol supportRandall Spangler2014-03-171-3/+2
| | | | | | | | | | | | | | | Version 1 protocols (without command version) were already no longer supported in cros_ec.c. This removes some dead code from the cros_ec_i2c driver. Version 2 protcols (with command version) are now called protocol_version=2, instead of cmd_version_is_supported=1. A subsequent change will introduce protocol version 3 for SPI. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Sync up with latest Chrome OS EC versionSimon Glass2014-03-173-46/+304
| | | | | | The EC messages have been expanded and some parts have been renamed. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Add a function for decoding the Chrome OS EC flashmapSimon Glass2014-03-171-0/+19
| | | | | | | | In order to talk to the EC properly we need to be able to understand the layout of its internal flash memory. This permits emulation of the EC for sandbox, and also software update in a system with a real EC. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Move EC interface into common libraryVadim Bendebury2014-03-171-0/+18
| | | | | | | | | | Add a common library for obtaining access to the Chrome OS EC. This is used by boards which need to talk to the EC. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Tested-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Add a function for reading a flash map entrySimon Glass2014-03-171-0/+18
| | | | | | | | | A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Add an enum for the number of flash regionsSimon Glass2014-03-171-1/+3
| | | | | | | | Add an enum for the number of flash regions so we can keep track of all the possible regions. Reviewed-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Increase memory size to 32MBSimon Glass2014-03-171-1/+1
| | | | | | | The current 4MB size is a little small for some tests, so increase it. Reviewed-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIGMasahiro Yamada2014-03-123-14/+9
| | | | | | | | | | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michael Walle <michael@walle.cc> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Dave Purdy <david.c.purdy@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Luka Perkov <luka@openwrt.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Suriyan Ramasami <suriyan.r@gmail.com>
* freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}Masahiro Yamada2014-03-128-25/+20
| | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* at91: enable USB ethernet for taskit stamp9g20Gerhard Sittig2014-03-121-1/+4
| | | | | | | | | | | enabling CONFIG_MACB makes other locations in the stamp config file enable network related commands (actually prevents disabling them) enable USB ethernet support by activating generic support as well as Asix and Moschip ethernet adapters Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Andreas Bießman <andreas.devel@googlemail.com>
* tegra: imx: omap: enable Moschip USB ethernet support for several boardsGerhard Sittig2014-03-125-0/+5
| | | | | | | | | | enable support for the Moschip USB ethernet adapter for those boards which previously had support for "all other" USB ethernet adapters (that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk, mx53loco, nitrogen6x, omap3_beagle Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* tegra: omap: alpha-sort USB ethernet items for Asix and SMSCGerhard Sittig2014-03-122-2/+2
| | | | | | | | | adjust the harmony and omap3_beagle board configs to make their CONFIG_USB_ETHER_* items appear in alphabetical order Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: introduce support for Moschip USB ethernetGerhard Sittig2014-03-121-0/+6
| | | | | | | | | | | | | | | introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109 the driver was implemented based on the U-Boot Asix driver with additional information gathered from the Moschip Linux driver, development was done on "Delock 61147" and "Logilink UA0025C" dongles Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: don't ifdef routine declarations in usb_ether.hGerhard Sittig2014-03-121-6/+2
| | | | | | | | | | | | while compilation of implemented routines and references from calling sites may be optional, declarations in header files should not be unconditionally declare the Asix and SMSC related public USB ethernet driver routines in the usb_ether.h header file Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-1025-58/+346
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| * arm: atmel: sama5d3: add nand spl boot supportBo Shen2014-03-091-0/+12
| | | | | | | | | | | | | | Add NAND SPL boot support with hardware PMECC. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mtd: nand: atmel: prepare for nand spl boot supportBo Shen2014-03-091-0/+6
| | | | | | | | | | | | | | | | | | Prepare for nand spl boot support. It supports nand software ECC and hardware PMECC. This patch is take <drivers/mtd/nand/nand_spl_simple.c> as reference. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: add spi spl boot supportBo Shen2014-03-091-0/+11
| | | | | | | | | | | | | | Add SPI SPL boot support for sama5d3xek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: atmel: add sama5d3 Xplained board supportBo Shen2014-03-091-0/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC. Now it supports boot from NAND flash and SD/MMC card. Features support: - NAND flash - SD/MMC card - Two USB hosts - Ethernet (one GMAC, one EMAC) Signed-off-by: Bo Shen <voice.shen@atmel.com> [reorder boards.cfg] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * at91sam9263ek: add mmc supportAndreas Henriksson2014-03-091-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for using the Atmel MCI driver on at91sam9263ek. This change is modeled after the existing at91sam9260ek support. Please note that this hooks up slot1 (MCI1) for SD. Not both. Tested with at91bootstrap and u-boot on dataflash in slot 0 and fat-formatted 8GB SDHC in slot 1 on first revision at91sam9263ek (which must use dataflash in slot0 to boot). CONFIG_ATMEL_MCI_PORTB not tested. Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> [remove empty line] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-076-46/+67
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| | * ARM: tegra: implement bootcmd_pxeStephen Warren2014-03-054-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | This retrieves a PXE config file over the network, and executes it. This allows an extlinux config file to be retrieved over the network and executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: rework boot scriptsStephen Warren2014-03-051-9/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the common Tegra boot scripts in the default environment to a) Make use of the new "test -e" shell command to avoid some error messages. b) Allow booting using the sysboot command and extlinux.conf. This allows easy creation of boot menus, and provides a simple interface for distros to parameterize/configure the boot process. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: convert tegra to use distro defaultsStephen Warren2014-03-051-16/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Modify all Tegra boards to include the "distro defaults" header, so that all the config options distros expect are enabled. Remove any #defines that enable the same options from the Tegra files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTSStephen Warren2014-03-054-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's EHCI controllers only have a single PORTSC register. Configure U-Boot to know this. This prevents e.g. ehci_shutdown() from touching non-existent registers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: move CONFIG_TEGRAnnStephen Warren2014-03-054-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | OMAP3: igep00x0: Enable required clocks for GPIO that are used.Enric Balletbo i Serra2014-03-061-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable required clocks for GPIO to fix a boot issue introduced by commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for peripherals only if they are used). Without this patch the u-boot freezes after the following messages OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz IGEPv2 + LPDDR/NAND I2C: ready DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Diving into the issue, the sequence that produces the u-boot freezes is setup_net_chip |--> gpio_direction_out |--> _set_gpio_dataout |--> __raw_writel To avoid this we just need enable the clocks for GPIOs that are used, but it would be interesting implement a mechanism to protect these situations and make sure that the clock is enabled when we request a GPIO. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
| * arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootupStefan Roese2014-03-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since the switch may be re-configured for VLAN usage in Linux (or any other OS), lets reset the switch to its default register values upon power-up. Otherwise network might not be available in U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com>
| * ARM: AM43xx: Add Ethernet boot support to SPLMugunthan V N2014-03-041-2/+8
| | | | | | | | | | | | | | Add Ethernet Boot support to SPL Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM335x: add support for reading cpsw 2nd mac address from efuseMugunthan V N2014-03-041-0/+1
| | | | | | | | | | | | | | | | | | Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also adding mii command support to am335x common config. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVMMugunthan V N2014-03-041-0/+20
| | | | | | | | | | | | | | | | Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected to RMII and RGMII phy respectively and enable cpsw in config. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-0412-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-03-101-0/+129
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| * | usb: create common header virtual root hub descriptorsStephen Warren2014-03-101-0/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | | m68k: Remove M5271EVB and idmr board supportMasahiro Yamada2014-03-102-474/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it as 1000000 and idmr.h defines it as (50000000 / 64). When compiling these two boards, a warning message is displayed: time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms" [-Wcpp] There are no board maintainers for them so this commit just deletes them. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Jason Jin <Jason.jin@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-03-076-6/+829
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| * | powerpc/t104xrdb: Update DDR initialization related settingsPriyanka Jain2014-03-072-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update following DDR related settings for T1040RDB, T1042RDB_PI -Correct number of chip selects to two as t1040 supports two Chip selects. -Update board_specific_parameters udimm structure with settings derived via calibration. -Update ddr_raw_timing sructure corresponding to DIMM. -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, but on T104xRDB, on setting this , DDR instability is observed. Board-level debugging is in progress. Verified the updated settings to be working fine with dual-ranked Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | powerpc/t1040qds: Add Video - HDMI supportPriyanka Jain2014-03-071-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 has internal display interface unit (DIU) for driving video. T1040QDS supports video mode via -LCD using TI enconder -HDMI type interface via HDMI encoder Chrontel, CH7301C encoder which is I2C programmable is used as HDMI connector on T1040QDS. This patch add support to -enable Video interface for T1040QDS -route qixis multiplexing to enable DIU-HDMI interface on board -program DIU pixel clock gerenartor for T1040 -program HDMI encoder via I2C on board Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t2080rdb: Add T2080PCIe-RDB board supportShengzhou Liu2014-03-071-0/+779
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. It works in two mode: standalone mode and PCIe endpoint mode. T2080PCIe-RDB Feature Overview ------------------------------ Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes 16 lanes configuration: - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10) - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3) - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2) - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) - SerDes-2 Lane G-H: to SATA1 & SATA2 IFC/Local Bus: - NOR: 128MB 16-bit NOR flash - NAND: 512MB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 gold-finger - One PCIe x4 connector - One PCIe x2 end-point device (C293 Crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a TF-card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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