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* ARM: uniphier: change stack pointer address for SPLMasahiro Yamada2016-02-141-1/+1
| | | | | | | | | | | | | | | | | No special reason for the current stack address 0x0ff08000. Change it to 0x00100000 to simplify the init_page_table. There are two types of SoCs in terms of the load address of SPL. [1] PH1-sLD3, PH1-LD4, PH1-sLD8 SPL is loaded at 0x00040000-0x0004ffff [2] PH1-Pro4, PH1-Pro5, ProXstream2, PH1-LD6b SPL is loaded at 0x00100000-0x0010ffff The new stack area (0x000f8000-0x00100000) should be safe for all the cases. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: update U-Boot file names in workflowMasahiro Yamada2016-02-141-2/+2
| | | | | | | | | | | | | | Since commit ad1ecd2063da ("fdt: Build a U-Boot binary without device tree") and commit 03c25bcd263a ("fdt: Build an SPL binary without device tree"), we can use shorter file names for the output images. The default configuration for UniPhier SoCs enables CONFIG_OF_SEPARATE and CONFIG_SPL_OF_CONTROL. In this case, spl/u-boot-spl.bin is the same as spl/u-boot-spl-dtb.bin. Likewise, u-boot.img is the same as as u-boot-dtb.img. So, this change of the flow has no impact. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: uniphier: fix nfsboot commandMasahiro Yamada2016-02-141-2/+8
| | | | | | This is no longer working, so needs reworking. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: factor out common part of boot commandsMasahiro Yamada2016-02-141-11/+10
| | | | | | | | The environment "bootm_low" is updated before the "bootz" command. This is common for all the boot modes (NOR, NAND, TFTP, etc.), so can be factored out. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add default bootm_low to fix FIT bootMasahiro Yamada2016-02-141-0/+1
| | | | | | | | Commit 25d4eb8091f4 ("ARM: uniphier: add bootm_low environment") missed to add "bootm_low" for FIT boot. Set "bootm_low" to the DRAM base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix NOR boot commandMasahiro Yamada2016-02-141-2/+3
| | | | | | | | | | Commit 89835b3557fe ("ARM: uniphier: allow to run zImage rather than uImage") changed the kernel boot commands. Unlike "bootm", "bootz" does not relocate the kernel image. When the boot device is a NOR flash, the zImage should be copied from the NOR onto the DRAM before it is passed to the "bootz" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* sniper: Drop references to P970Paul Kocialkowski2016-02-081-1/+1
| | | | | | | | | There are various different boards with the same hardware sold as LG Optimus Black, such as P970, P970g and KU5900. Since this port is functional for all variants, it doesn't make sense to keep references to P970. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* Remove unused CONFIG_CMD_HWFLOW option and associated dead code.David Müller (ELSOFT AG)2016-02-081-1/+0
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.David Müller (ELSOFT AG)2016-02-081-4/+0
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* ARM: rpi: set fdt_high in the default environmentStephen Warren2016-02-081-0/+1
| | | | | | | | | | | | The ARM Linux kernel requires the DT to be in memory accessible early during the boot process. This always happens naturally on the RPi 1, since the maximum memory size of 512MiB, and additionally some of that is reserved for use by the GPU. The RPi 2 has 1GiB of RAM (minus some GPU usage), and so if the DT is relocated to the top of RAM, Linux cannot access it. Prevent this from happening by setting fdt_high. Cc: Daniel Stone <daniels@collabora.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: rpi: update memory layout env. var. documentationStephen Warren2016-02-081-5/+11
| | | | | | | | | | | | | Update rpi-common.h's documentation that describes the rationale for choosing various addresses for standardized variables used by boot scripts. This comment was correct when written, but not updated when some of the values were changed. Fixes: 14006a567105 ("rpi: set fdt_addr_r to 0x00000100 to match default ...device_tree_address") Cc: Jonathan Liu <net147@gmail.com> Cc: Daniel Stone <daniels@collabora.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* OMAP3: omap3_logic: Remove YAFFS support.Adam Ford2016-02-081-2/+0
| | | | | | | | UBIFS is the preferred FS, and YAFFS isn't officially included in Linux. Removing this feature reduces the code size. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: omap3_logic: Enable CONFIG_SMC911X_32_BITAdam Ford2016-02-081-1/+1
| | | | | | | | The interface automatically converts one 32-bit word into two 16 words. The README said it is permissible to use this flag in that scenario. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: omap3_logic: Enable Android FastbootAdam Ford2016-02-081-0/+21
| | | | | | | | | Android Fastboot requires USB. The TWL4030 PMIC on omap3_logic handles USB traffic. This patch sets up the USB gadget and Android Fastboot to match what is done in the omap3_beagle project. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* dm: freescale: Drop mxs_auart serial driverSimon Glass2016-02-081-2/+0
| | | | | | | This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org>
* OMAP3: Enable SPL on omap3_logicAdam Ford2016-02-081-124/+129
| | | | | | | | | | | Previously, Omap3_logic assumed X-loader was present. With this patch, we can finally replace X-loader with an MLO generated by U-Boot. This requires ECC to be setup to match the Linux Kernel and the PBIAS confgured for the SD card. Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* tools: env validate: pass values as 0-based arrayAndreas Fenkart2016-02-081-1/+1
| | | | | | passing argv/argc can produce off-by-one errors Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2016-02-0865-71/+80
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| * fdt: introduce fdtdec_get_child_countPeng Fan2016-02-061-0/+9
| | | | | | | | | | | | | | | | | | Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * Use correct spelling of "U-Boot"Bin Meng2016-02-0664-71/+71
| | | | | | | | | | | | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* | dm: pci: Add missing forward declarationsBin Meng2016-02-051-11/+5
| | | | | | | | | | | | | | | | When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration for pci_write_config32(). Add other missing ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: chromebox_panther: Drop the cache line size hackBin Meng2016-02-051-2/+0
| | | | | | | | | | | | | | Now that the RTL8169 driver warning is fixed we can drop this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | efi: app: Disable CONFIG_USB_EHCI_PCIBin Meng2016-02-051-0/+1
| | | | | | | | | | | | | | | | It does not build if without CONFIG_DM_PCI_COMPAT. For now we just disable it, until some day we add USB support to EFI application. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | efi: app: Clean up defconfigBin Meng2016-02-051-3/+0
| | | | | | | | | | | | | | | | Move some #undef from efi-x86.h to efi-x86_defconfig as these are already Kconfig options. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Add get_io_base opBin Meng2016-02-051-0/+18
| | | | | | | | | | | | | | | | | | | | On some newer chipset (eg: BayTrail), there is an IO base address register on the PCH device which configures the base address of a memory-mapped I/O controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Add get_gpio_base opBin Meng2016-02-051-0/+18
| | | | | | | | | | | | | | | | | | | | x86 GPIO registers are accessed via I/O port whose base address is configured in a PCI configuration register on the PCH device. Add an op get_gpio_base to get the GPIO base address from PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Rename get_sbase op to get_spi_baseBin Meng2016-02-051-4/+4
| | | | | | | | | | | | | | | | Spell out 'sbase' to 'spi_base' so that it looks clearer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Remove pch_get_version opBin Meng2016-02-051-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | pch_get_version op was only used by the ich spi controller driver, and does not really provide a good identification of pch controller so far, since we see plenty of Intel PCH chipsets and one differs from another a lot, which is not simply either a PCHV_7 or PCHV_9. Now that ich spi controller driver was updated to not get such info from pch, the pch_get_version op is useless now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: tnc: Drop unprotect_spi_flash()Bin Meng2016-02-051-1/+0
| | | | | | | | | | | | | | | | | | Unprotecting SPI flash is now handled in the SPI controller driver, via a call to the PCH driver. Drop the ad-hoc version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: x86-common.h: Add CONFIG_BOOTDELAYStefan Roese2016-02-051-0/+2
|/ | | | | | | | | | | | | Without this CONFIG_BOOTDELAY, autobooting does not work at all. As autoboot_command() from common/* will not get called. So lets define CONFIG_BOOTDELAY, so that auto-booting works on x86. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Miao Yan <yanmiaobest@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Miao Yan <yanmiaobest@gmail.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* arm: vybrid: Drop enabling GPIO, SPI and UART in legacy modeBhuvanchandra DV2016-02-023-19/+0
| | | | | | | | | Remove the legacy way of enabling GPIO, SPI and UART on Vybrid based boards since these driver's now only supports DT mode. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* imx: mx6sxsabresd: Add MCIMX28LCD display supportYe Li2016-02-021-0/+20
| | | | | | | | The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1 port, enable this display feature by adding relevant BSP codes and configurations. Signed-off-by: Ye Li <ye.li@nxp.com>
* mx6slevk: Remove CONFIG_ETHPRIME optionFabio Estevam2016-02-021-1/+0
| | | | | | | As mx6slevk has only one Ethernet port, we don't need to declare CONFIG_ETHPRIME, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO boardYe Li2016-02-021-0/+212
| | | | | | | Initial version for mx6sx SABREAUTO board support with features: PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander. Signed-off-by: Ye Li <ye.li@nxp.com>
* wandboard: fix variable name so PXE boot worksPeter Robinson2016-02-021-1/+1
| | | | | | | | | All boards that support PXE booting use the pxefile_addr_r variable. Standardise wandboard with this variable as pxe_addr_r isn't used anywhere else so it's a typo. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-021-0/+39
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| * board: atmel: sama5d2_xplained: add SPL supportWenyou Yang2016-02-021-0/+39
| | | | | | | | | | | | | | | | The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-02-024-4/+3
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| * | arm8: ls2080: Move the core errata defines out of board specific fileAshish kumar2016-02-011-3/+0
| | | | | | | | | | | | | | | | | | | | | Valid for core A57 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv7: ls102xa: Increase the supported kernel sizeAlison Wang2016-02-012-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Increase the kernel size supported for LS1021A platform. Define CONFIG_SYS_BOOTM_LEN to 64M. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | board: ls2085aqds: Update kernel_size env variablePrabhakar Kushwaha2016-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | kernel_size env variable is defined as 0x28000000, it is beyond NOR flash range. Update kernel_size with 40MB kernel size. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | socfpga: Simplify Makefile filenamesSimon Glass2016-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | We don't need the -dtb suffix anymore, so drop it. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | mmc: add missing prototype for mmc_get_env_devClemens Gruber2016-02-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a follow-up patch to e92029c0f4 and adds a prototype for the weak mmc_get_env_dev function. Cc: Tom Rini <trini@konsulko.com> Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-02-012-0/+197
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| * | | board: Enable ethernet, tftpboot support to pic32mzdask board.Purna Chandra Mandal2016-02-011-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also custom environment variables/scripts are added to help boot from network. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | | board: add SDHCI support for PIC32MZDASK board.Purna Chandra Mandal2016-02-011-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable MMC, SDHCI, FAT_FS support for PIC32MZ[DA] StarterKit. Also add custom scripts, rules to boot Linux from microSD card. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | | board: Add Microchip PIC32MZ[DA]-Starter-Kit board.Purna Chandra Mandal2016-02-011-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.Purna Chandra Mandal2016-02-011-0/+29
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers and dividers capable of supplying clock to various controllers on or off-chip. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | arm: novena: Fix EEPROM i2c configurationMarek Vasut2016-01-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Novena, the DRAM SPD is connected to i2c1 while the Utility EEPROM is connected to i2c3. Now that the EEPROM handling in U-Boot is fixed, also fix this bit on Novena. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Sean Cross <xobs@kosagi.com> Cc: Stefano Babic <sbabic@denx.de>
* | | armv7: add cacheline sizes where missingAlbert ARIBAUD2016-01-3122-0/+46
|/ / | | | | | | | | | | | | | | | | | | Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
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