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* add block write function to spartan3 slave serial loadWolfgang Wegner2010-03-241-0/+1
| | | | | | | | | | | Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
* fpga: Remove relocation fixupsPeter Tyser2009-10-031-1/+0
| | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-14/+14
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Big white-space cleanup.Wolfgang Denk2008-05-211-34/+34
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Improve configuration of FPGA subsystemMatthias Fuchs2008-01-091-2/+2
| | | | | | | | | | | | | This patch removes the FPGA subsystem configuration through the CONFIG_FPGA bitmask configuration option. See README for the new options: CONFIG_FPGA, CONFIG_FPGA_<vendor>, CONFIG_FPGA_<family> Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* Add Xilinx Spartan3 family FPGA supportWolfgang Denk2005-09-251-0/+3
| | | | Patch by Kurt Stremerch, 14 February 2005
* Initial revisionwdenk2002-11-031-0/+102
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