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* MPC512x: remove include/mpc512x.hWolfgang Denk2009-06-121-702/+0
| | | | | | | | | | | | | | | | | | | | Move needed definitions (register descriptions etc.) from include/mpc512x.h into include/asm-ppc/immap_512x.h. Instead of using a #define'd register offset, use a function that provides the PATA controller's base address. All the rest of include/mpc512x.h are register offset definitions which can be eliminated by proper use of C structures. There are only a few register offsets remaining that are needed in cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h which is intended as a temporary workaround only. In a later patch this file will be removed, too, and then auto-generated from the respective C structs. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* ADS5121 Add PATA supportRalph Kondziella2009-02-031-0/+1
| | | | | | | | | | | | Original patch from Ralph Kondziella plus clean up by Wolfgang Denk plus changes by John Rigby use ips clock not lpc port forward to current u-boot release Signed-off-by: Ralph Kondziella <rk@argos-messtechnik.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: John Rigby <jrigby@freescale.com>
* ADS5121 Add IC Ident Module (IIM) supportMartha Marx2009-02-031-0/+24
| | | | | | | | | | | | IIM (IC Identification Module) is the fusebox for the mpc5121. Use #define CONFIG_IIM to turn on the clock for this module use #define CONFIG_CMD_FUSE to add fusebox commands. Fusebox commands include the ability to read the status, read the register cache, override the register cache, program the fuses and sense them. Signed-off-by: Martha Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ADS5121: Fix NOR and CPLD ALE timing for rev 2 siliconJohn Rigby2008-08-281-0/+1
| | | | | | | | | | | | | | | | MPC5121 rev 2 silicon has a new register for controlling how long CS is asserted after deassertion of ALE in multiplexed mode. The default is to assert CS together with ALE. The alternative is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE. The default is wrong for the NOR flash and CPLD on the ADS5121. This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD) it does so conditionally based on silicon rev 2.0 or greater. Signed-off-by: Martha J Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
* mpc5121: Move iopin features from board specific to common files.Kenneth Johansson2008-08-051-33/+218
| | | | | | And in the process eliminate some duplicate register defines. Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
* MPC5121e ADS PCI support take 3John Rigby2008-03-021-0/+84
| | | | | | | | | | | | | | | | Adds PCI support for MPC5121 Tested with drivers/net/rtl8139.c Support is conditional since PCI on old silicon does not work. ads5121_PCI_config turns on PCI In this version, condition compilation of PCI code has been moved from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as suggested by Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: John Rigby <jrigby@freescale.com>
* Change IPS freq to 66MHzJohn Rigby2008-02-071-1/+1
| | | | | | | Recommended frequency is 66MHz Change divider from 4 to 3. Signed-off-by: John Rigby <jrigby@freescale.com>
* Set ips dividor to 1/4 of csb clock.Grzegorz Bernacki2008-01-171-1/+1
| | | | | | | Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ADS5121: MAX slew rate for PATA pinsJohn Rigby2008-01-131-0/+9
| | | | Signed-off-by: John Rigby <jrigby@freescale.com>
* Coding style cleanup, update CHANGELOGWolfgang Denk2007-08-021-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* [ADS5121] Support for the ADS5121 boardRafal Jaworowski2007-07-271-0/+398
The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Jan Wrobel <wrr@semihalf.com>
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