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* exynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.Przemyslaw Marczak2015-11-021-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds additional file with implementation of board detection code for Odroid-XU3/XU4. The detection depends on compatible found in fdt: - "samsung,exynos5" - uses Exynos5 generic code - "samsung,odroidxu3" - try detect XU3 revision There are few revisions of Odroid XU3/XU4, each can be detected by checking the value of channel 9 of built-in ADC: Rev ADC Board 0.1 0 XU3 0.1 0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT 0.3 1280 XU4 0.1 The detection code depends on the ADC+10% value. Implementation of functions: - set_board_type() - read ADC and set type - get_board_rev() - returns board revision: 1..3 - get_board_type() - returns board type string Additional functions with return values of bool: - board_is_generic() - true if found compatible "samsung,exynos5" but not "samsung,odroidxu3" - board_is_odroidxu3() - true if found compatible "samsung,odroidxu3" and one of XU3 revision. - board_is_odroidxu4() - true if found compatible "samsung,odroidxu3" and XU4 revision. After I2C controller init, the get_board_type() can check if the XU3 board is a "Lite" variant, by probing chip 0x40 on I2C0 (INA231 - exists only on non-lite). This is useful for setting fdt file name at misc_init_r(). Enabled configs: - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - CONFIG_ODROID_REV_AIN - CONFIG_REVISION_TAG - CONFIG_BOARD_TYPES Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-10-3044-57/+582
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| * ls102xa: Adjust some macros for SD boot on LS1021A QDS boardAlison Wang2015-10-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | As more features are added for SD boot on LS1021A QDS board, the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS needs to be adjusted to a suitable value. Starting address of the malloc pool used in SPL needs to be adjusted too, or it will occupy the address u-boot loads. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * configs: ls1021atwr: Enable ID EEPROM for SD bootYao Yuan2015-10-301-2/+0
| | | | | | | | | | | | | | | | I2C1 can work on ls102xa rev2.0 SD boot, so add ID EEPROM for SD boot. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm: ls102xa: Set fdt_high and initrd_high to the value of 0xffffffffAlison Wang2015-10-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043a: Enable secondary coresHou Zhiqiang2015-10-291-0/+3
| | | | | | | | | | | | | | | | | | | | After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to make secondary cores excute in spin loop. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043ardb: Add sd boot supportGong Qianyu2015-10-292-1/+40
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu2015-10-291-0/+11
| | | | | | | | | | | | | | | | This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043a: Add Fman supportShaohui Xie2015-10-292-0/+37
| | | | | | | | | | | | | | | | Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043ardb: Add nand boot supportGong Qianyu2015-10-292-0/+73
| | | | | | | | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu2015-10-292-0/+363
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
| * armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-291-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv7/ls1021a: move ns_access to common fileMingkai Hu2015-10-292-2/+2
| | | | | | | | | | | | | | | | | | | | Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * common/board_f.c: change the macro name and remove it for PPC platformsGong Qianyu2015-10-2941-40/+18
| | | | | | | | | | | | | | | | | | | | For most PPC platforms, they will call the first get_clocks() in init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is then defined to call the second get_clocks(), which should be redundant for PPC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8: ls2085ardb: enable CONFIG_PHY_AQUANTIAShaohui Xie2015-10-291-0/+1
| | | | | | | | | | | | | | To support on board Aquantia's PHY AQR405. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm: ls1021a: Add QSPI or IFC support in SD bootAlison Wang2015-10-261-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in SD boot now. For the customer's demand, QSPI needs to be supported in SD boot too. This patch adds QSPI or IFC support in SD boot according to the corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is used to support QSPI in SD boot. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * QE: modify the address of qe ucodeZhao Qiang2015-10-262-2/+2
| | | | | | | | | | | | | | The address of uboot changed, so change qe ucode Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/fsl-ls: Add CONFIG_OF_STDOUT_VIA_ALIASScott Wood2015-10-263-0/+3
| | | | | | | | | | | | | | | | This will allow OF-based earlycon to be used once the appropriate aliases are added to the device tree and kernel support is fixed. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-10-281-0/+15
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| * | zynq-common: Add SPL SPI offset, size configsSiva Durga Prasad Paladugu2015-10-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL spi mode. These macros defines the device tree offset, size and the kernel image offset in flash respectively. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | zynq-common: Enable ISSI SPI-NOR flash supportJagan Teki2015-10-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
| * | zynq-common: Enable Bank/Extended address register supportJagan Teki2015-10-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled SPI flash Bank/Extended address register support. Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | zynq-common: Enable zynq qspi controller supportJagan Teki2015-10-251-0/+9
| |/ | | | | | | | | | | | | | | | | | | | | This patch adds support for zynq qspi controller driver on zynq-common.h Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
* | ocotea: DropTom Rini2015-10-271-194/+0
| | | | | | | | | | | | | | | | | | | | This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | taishan: DropTom Rini2015-10-271-193/+0
| | | | | | | | | | | | | | | | | | | | This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ebony: DropTom Rini2015-10-271-174/+0
| | | | | | | | | | | | | | | | | | | | This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | taihu: RemoveTom Rini2015-10-271-307/+0
|/ | | | | | | | | | This board has not compiled for me for quite some time due to size constraints, remove. Cc: John Otken <jotken@softadvances.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* common/board_f.c: modify the macro to use get_clocks() more commonGong Qianyu2015-10-2440-0/+40
| | | | | | get_clocks() should not be limited by ESDHC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
* arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada2015-10-24234-257/+0
| | | | | | | | | | | We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: rpi: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportGuillaume GARDET2015-10-241-0/+1
| | | | | | | | | | | | Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support and enable it to set 'board_rev' and 'board_name' envs. 'board_rev' can be used in scripts to determine what board we are running on and 'board_name' for pretty printing. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* net: convert altera_tse to driver model and phylibThomas Chou2015-10-231-0/+8
| | | | | | | | Convert altera_tse to driver model and phylib. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: zap nios2-generic board dirThomas Chou2015-10-231-8/+16
| | | | | | | As we use device tree to control u-boot now, the generic board can be removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: convert altera sysid to driver modelThomas Chou2015-10-231-1/+1
| | | | | | | | Convert altera sysid to driver model with misc uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: convert altera timer to driver modelThomas Chou2015-10-231-5/+0
| | | | | | | Convert altera timer to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com>
* nios2 : convert altera_pio to driver modelThomas Chou2015-10-231-20/+1
| | | | | | | | Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: convert altera_uart to driver modelThomas Chou2015-10-231-8/+1
| | | | | | | | Convert altera_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* nios2: convert altera_jtag_uart to driver modelThomas Chou2015-10-231-3/+0
| | | | | | | | Convert altera_jtag_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* nios2: Split timer code into timer.cThomas Chou2015-10-231-2/+1
| | | | | | | | Move the timer code from interrupts.c into timer.c . Eliminate the installation of timer interrupt handler, which is no longer used. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: Switch to generic timerThomas Chou2015-10-231-6/+2
| | | | | | | | Zap almost all of the ad-hoc timer code from interrupts.c and use the code in lib/time.c instead. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: move altera_pio_init to board_early_init_rThomas Chou2015-10-231-0/+1
| | | | | | | | As altera_pio_init() uses BSS, it should be moved to board_early_init_r(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* nios2: move command line configuration to KconfigThomas Chou2015-10-231-8/+1
| | | | | | | | | | | This patch moves command line configuration from board header file to board defconfig in the way of Kconfig. The change passed savedefconfig. This fixes warnings such as : "CONFIG_SYS_HUSH_PARSER" redefined, when "Use hush shell" is selected with menuconfig, etc. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* ti_omap5_common: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> asdfsadf
* am43xx_evm: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am43xx_evm.h: : switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIALMugunthan V N2015-10-221-1/+5
| | | | | | Tested on am437x gp evm and am437x sk evm Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x_evm: mmc: do not define DM_MMC for splMugunthan V N2015-10-221-0/+8
| | | | | | | | Since spl doesn't support DM currently, do not define DM_MMC for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: k2g: Add config fileLokesh Vutla2015-10-221-0/+59
| | | | | | | | Add config file for k2g Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
* ARM: k2g: Add clock informationVitaly Andrianov2015-10-221-1/+10
| | | | | | | | Add clock information for Galileo Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: dts: k2hk: Enable OF_CONTROL and DMLokesh Vutla2015-10-221-1/+5
| | | | | | | Import k2hk specific DT files from Linux Kernel and enable OF_CONTROL, DM, DM_SERIAL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: spl: Fix stack allocation with CONFIG_SYS_MALLOC_F_LENLokesh Vutla2015-10-221-0/+7
| | | | | | | | | | If CONFIG_SYS_MALLOC_F_LEN is enabled, the stack is moved down to the specified size to make the malloc function available before relocation. But on keystone platforms SYS_SPL_MALLOC is immediately preceding stack, which is causing an overlap with this config enabled. So leave a gap between malloc space and stack space. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ti_omap5_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIALTom Rini2015-10-221-0/+4
| | | | | Tested on J6Eco EVM Signed-off-by: Tom Rini <trini@konsulko.com>
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