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* ARM: tegra: CONFIG_{SYS_, }LOAD{_, }ADDR rationalizationStephen Warren2015-05-131-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As best I can tell, CONFIG_SYS_LOAD_ADDR and CONFIG_LOADADDR/$loadaddr serve essentially the same purpose. Roughly, if a command takes a load address, then CONFIG_SYS_LOAD_ADDR or $loadaddr (or both) are the default if the command-line does not specify the address. Different U-Boot commands are inconsistent re: which of the two default values they use. As such, set the two to the same value, and move the logic that does this into tegra-common-post.h so it's not duplicated. A number of other non- Tegra boards do this too. The values chosen for these macros are no longer consistent with anything in MEM_LAYOUT_ENV_SETTINGS. Regain consistency by setting $kernel_addr_r to CONFIG_LOADADDR. Older scripts tend to use $loadaddr for the default kernel load address, whereas newer scripts and features tend to use $kernel_addr_r, along with other variables for other purposes such as DTBs and initrds. Hence, it's logical they should share the same value. I had originally thought to make the $kernel_addr_r and CONFIG_LOADADDR have different values. This would guarantee no interference if a script used the two variables for different purposes. However, that scenario is unlikely given the semantic meaning associated with the two variables. The lowest available value is 0x90200000; see comments for MEM_LAYOUT_ENV_SETTINGS in tegra30-common-post.h for details. However, that value would be problematic for a script that loaded a raw zImage to $loadaddr, since it's more than 128MB beyond the start of SDRAM, which would interfere with the kernel's CONFIG_AUTO_ZRELADDR. So, let's not do that. The only potential fallout I could foresee from this patch is if someone has a script that loads the kernel to $loadaddr, but some other file (DTB, initrd) to a hard-coded address that the new value of $loadaddr interferes with. This seems unlikely. A user should not do that; they should either hard-code all load addresses, or use U-Boot-supplied variables for all load addresses. Equally, any fallout due to this change is trivial to fix; simply modify the load addresses in that script. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Paul Walmsley <pwalmsley@nvidia.com> Reviewed-by: Simon Glass Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: i2c: tegra: Convert to driver modelSimon Glass2014-12-111-3/+0
| | | | | | | | | | | | | | | | | | | | | | This converts all Tegra boards over to use driver model for I2C. The driver is adjusted to use driver model and the following obsolete CONFIGs are removed: - CONFIG_SYS_I2C_INIT_BOARD - CONFIG_I2C_MULTI_BUS - CONFIG_SYS_MAX_I2C_BUS - CONFIG_SYS_I2C_SPEED - CONFIG_SYS_I2C This has been tested on: - trimslice (no I2C) - beaver - Jetson-TK1 It has not been tested on Tegra 114 as I don't have that board. Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTSStephen Warren2014-03-051-0/+1
| | | | | | | | | Tegra's EHCI controllers only have a single PORTSC register. Configure U-Boot to know this. This prevents e.g. ehci_shutdown() from touching non-existent registers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move CONFIG_TEGRAnnStephen Warren2014-03-051-5/+0
| | | | | | | | | | <asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: fix "bootp" issue for Tegra124 tooJim Lin2014-02-031-0/+1
| | | | | | | | | | | | | Fix the timeout issue after running "bootp" command in U-Boot console. TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is set (per technical reference manual). Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add Venice2 (Tegra124) boardTom Warren2014-02-031-0/+82
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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