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* configs: Re-sync with cmd/KconfigTom Rini2016-04-251-5/+0
| | | | | | | Update the config.h and defconfig files for the commands that 8e3c036 converted over to Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: Re-sync almost all of cmd/KconfigTom Rini2016-04-251-7/+0
| | | | | | | | This syncs up the current cmd/Kconfig and include/configs/ files with the only exception being CMD_NAND. Due to how we have used this historically we need to take further care here when converting. Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: Re-sync HUSH optionsTom Rini2016-04-251-2/+0
| | | | | | | Move all cases of CONFIG_SYS_HUSH_PARSER out of the config.h files. Remove all cases of CONFIG_SYS_PROMPT_HUSH_PS2 as everyone uses the default. Signed-off-by: Tom Rini <trini@konsulko.com>
* Move CONFIG_OF_LIBFDT to KconfigSimon Glass2016-03-141-1/+0
| | | | | | Move this option to Kconfig and tidy up existing boards. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: vybrid: Drop enabling GPIO, SPI and UART in legacy modeBhuvanchandra DV2016-02-021-3/+0
| | | | | | | | | Remove the legacy way of enabling GPIO, SPI and UART on Vybrid based boards since these driver's now only supports DT mode. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* armv7: add cacheline sizes where missingAlbert ARIBAUD2016-01-311-0/+2
| | | | | | | | | | Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
* serial: lpuart: Move CONFIG_FSL_LPUART to KconfigBin Meng2016-01-201-1/+0
| | | | | | | | | | | LPUART is seen on Freescale VF610 and QorIQ Layerscape devices. Create a Kconfig option and move it to defconfig for all boards that have this serial driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Simon Glass <sjg@chromium.org>
* sf: Move SPI flash drivers to defconfigBin Meng2015-11-251-1/+0
| | | | | | | | There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* spi: Move SPI drivers to defconfigBin Meng2015-11-251-1/+0
| | | | | | | | There are already Kconfig options for SPI drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada2015-10-241-1/+0
| | | | | | | | | | | We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* cmd: Convert CONFIG_CMD_ELF to KconfigBin Meng2015-10-211-3/+0
| | | | | | Convert CONFIG_CMD_ELF to Kconfig and tidy up affected boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* pcm052: fix MTD partitioningAlbert ARIBAUD (3ADEV)2015-10-111-35/+85
| | | | | | | | MTD partitioning in current pcm052 configuration is inconsistent. Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and CONFIG_ENV_OFFSET[_REDUND]. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* vf610: add support for Phytec PCM052Albert ARIBAUD \(3ADEV\)2015-10-021-0/+231
Devices supported are: - NFC (NAND FLASH) - MMC - QSPI (SPI NOR FLASH) - I2C (only bus 2) - I2C RTC - I2C EEPROM - FEC Patch-series: 2 - remove useless CONFIG_SYS_SPD_BUS_NUM from config - remove include of config_cmd_default.h - remove duplicate CONFIG_CMD_NET Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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