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* Davinci: Configurable NAND chip selectsNick Thompson2010-01-041-0/+1
| | | | | | | | | | Davinci: Configurable NAND chip selects Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver. Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
* common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOULHeiko Schocher2009-12-081-1/+0
| | | | | | | | | There is more and more usage of printing 64bit values, so enable this feature generally, and delete the CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL defines. Signed-off-by: Heiko Schocher <hs@denx.de>
* TI DaVinci: Remove references to SZ_xxSandeep Paulraj2009-10-131-2/+1
| | | | | | | | | | This patch removes the asm/sizes.h header file from being included in the DaVinci SOC configs. References to SZ_xx have been replaced by appropriate bit shifted values. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Wolfgang Denk <wd@denx.de>
* NAND: Part 2: Fix warning Please define CONFIG_SYS_64BIT_VSPRINTF...Wolfgang Denk2009-07-181-0/+1
| | | | | | | | | | | Commit 8d2effea added a warning for configurations that use NAND without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but failed to fix the affected boards. This patch covers the non-PPC boards that were missed in the previous patch (commit 170c1972). Signed-off-by: Wolfgang Denk <wd@denx.de>
* Switched davinci_emac Ethernet driver to use newer APIBen Warren2009-06-151-0/+1
| | | | | | | | Added CONFIG_NET_MULTI to all Davinci boards Removed all calls to Davinci network driver from board code Added cpu_eth_init() to cpu/arm926ejs/cpu.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* davinci: display correct clock infoDavid Brownell2009-06-121-2/+2
| | | | | | | | | | | | Move the clock-rate dumping code into the cpu/.../davinci area where it should have been, enabled by CONFIG_DISPLAY_CPUINFO, updating the format and showing the DSP clock (where relevant). Switch boards to use the cpuinfo() hook for this stuff. Remove a few now-obsolete PLL #defines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: split out some dm644x-specific bits from pscDavid Brownell2009-06-121-0/+1
| | | | | | | | | | | | | | Split out DaVinci DM6446-specific bits from more generic bits: - Add a CONFIG_SOC_DM644X. All current boards use DM6446 chips; DM6443 and DM6441 chips differ in available peripherals. - Move most DM644X-specific bits from psc.c to a new dm644x.c file, which is conditionally built. It provides device-specific setup. Plus minor coding style and comment updates with respect to the PSC. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* minor DaVinci clock cleanupDavid Brownell2009-04-241-2/+1
| | | | | | | | | | | | | | Minor cleanup to clock-related defines for DaVinci DM6446 boards: - CONFIG_SYS_CLK_FREQ is unused; remove it. - CONFIG_SYS_NS16550_CLK must be the same as CONFIG_SYS_HZ_CLOCK On DM6446 both of those peripheral clocks actually come from the same source, the primary oscillator. Having them use the same symbol avoids bugs in the clone'n'modify development cycle. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fix DaVinci NS16550_REG_SIZE regressionDavid Brownell2009-04-161-1/+1
| | | | | | | | | | | | | Update the DaVinci DM6446 boards to use the new convention for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed from the original 4 bytes, but these chips are little-endian. (Resolves a regression added recently by the include/ns16550.h patch to "Unify structure declaration for registers". The code previously worked just fine because the registers were accessed as host-endian words, not as bytes.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-301-0/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger2009-01-231-1/+0
| | | | | | | | | | | | | | | | This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-39/+39
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD2008-09-101-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-101-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NANDJean-Christophe PLAGNIOL-VILLARD2008-09-101-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: Fix for broken compilation when defining CONFIG_CMD_ELFHugo Villeneuve2008-07-131-0/+1
| | | | | | caused by missing dcache status/enable/disable functions. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
* ARM: Fix for wrong patch version applied for Lyrtech SFF-SDR board (ARM926EJS)Hugo Villeneuve2008-07-101-48/+21
| | | | | | | | ARM: Fix for incorrect version of patch applied when adding support for the Lyrtech SFF-SDR board. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Signed-off-by: Philip Balister, OpenSDR <philip@opensdr.com>
* ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)Hugo Villeneuve2008-06-281-0/+177
This patch adds support for the Lyrtech SFF-SDR board, based on the TI DaVinci architecture (ARM926EJS). Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Signed-off-by: Philip Balister <philip@balister.org> Signed-off-by: Wolfgang Denk <wd@denx.de>
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